PDU1016H 데이터 시트보기 (PDF) - Data Delay Devices

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PDU1016H

4-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE

Data Delay Devices 

PDU1016H

DELAY LINE AUTOMATED TESTING

TEST CONDITIONS

INPUT:

Ambient Temperature: 25oC ± 3oC

Supply Voltage (Vcc): -5.0V ± 0.1V

Input Pulse:

Standard 10KH ECL

levels

Source Impedance: 50Ω Max.

Rise/Fall Time:

2.0 ns Max. (measured

between 20% and 80%)

Pulse Width:

PWIN = 1.5 x Total Delay

Period:

PERIN = 10 x Total Delay

OUTPUT:

Load:

Cload:

Threshold:

50Ω to -2V

5pf ± 10%

(VOH + VOL) / 2

(Rising & Falling)

NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.

PULSE

GENERATOR

OUT

TRIG

IN DEVICE UNDER OUT

TEST (DUT)

REF

IN

TRIG

OSCILLOSCOPE

ADDRESS SELECT

Test Setup

TRISE

PWIN

PERIN

TFALL

INPUT

80%

VIH

80%

SIGNAL

50%

20%

50%

20%

VIL

DRISE

DFALL

OUTPUT

SIGNAL

VOH

50%

50%

VOL

Timing Diagram For Testing

Doc #97044

DATA DELAY DEVICES, INC.

5

11/1/01

3 Mt. Prospect Ave. Clifton, NJ 07013

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