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MB86330CR-ES 데이터 시트보기 (PDF) - Fujitsu

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MB86330CR-ES
Fujitsu
Fujitsu Fujitsu
MB86330CR-ES Datasheet PDF : 46 Pages
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MB86330
s PIN DESCRIPTION
Pin no.
114
Pull up
Pin name Bit I/O Active
or
pull down
Function
MCLK
1I
Master clock input
MCLK
SCKout
173
172
50,
116,
175
PM
1I
PSTOP 1 I
MOD
[2:0]
3I
(Internal system
clock)
1 machine cycle
Pull up Internal master clock input can be selected.
0: MCLK, 1: PLL output
H
PLL operation setup
0: PLL operation, 1: PLL stop
— Pull down Operating mode
MOD2 MOD1 MOD0
0
0
0
Other than above
Operating
mode
Single chip
mode
Disabled
21,
WMD
2I
— Pull down External memory WAIT mode
91
[1:0]
WMD1 SMD0
Wait
cycle
Can data be
rewritten?
0
0
0 cyc
No
0
1
5 cyc
No
1
0 15 cyc
Yes
1
1 30 cyc
Yes
174
F1
1I
Flag input 1 (level sense)
49
F0
1I
Flag input 0 (level sense)
177
XRST
1I
L
Reset input
222
SCKOUT 1 O
Internal system clock output
44
SCZC
1I
H Pull down Hi-z control over SCKOOUT, POUT and EA
[15:0] (SCZC = “L”)
151
BOOT
1I
H
Input for a BOOT mode control signal
89
BTACT
1O
H
Output for a BOOT mode status indication
signal
19,
PAGE
2O
205
[1:0]
Output for an external memory/page
selection control signal
67,
ST
132,
[2:0]
237
3O
Internal status output
(Continued)
7

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