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RMBA19500 데이터 시트보기 (PDF) - Fairchild Semiconductor

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RMBA19500
Fairchild
Fairchild Semiconductor Fairchild
RMBA19500 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Electrical Characteristics2
Parameter
Frequency Range
Gain (Small Signal) Over 1930–1990MHz
Gain Variation:
Over Frequency Range
Over Temperature Range
Noise Figure
Linear Output Power: for CDMA3
OIP34
PAE @ 33dBm Pout
Input VSWR (50)
Drain Voltage (Vdd)
Gate Voltage (VG1, 2 and VG3)5
Quiescent Currents (IDQ1, 2 and IDQ3)5
Thermal Resistance (Channel to Case) RJC
Min
1930
33
-2
Typ
30
±1.0
±1.5
6
43
24
2:1
7.0
180, 445
11
Max
1990
-0.25
Units
MHz
dB
dB
dB
dB
dBm
dBm
%
V
V
mA
°C/W
Notes:
2. VDD = 7.0V, TC = 25°C. Part mounted on evaluation board with input and output matching to 50.
3. 9 Channel Forward Link QPSK Source; 1.23Mbps modulation rate. CDMA ACPR1 is measured using the ratio of the average power within the 1.23MHz channel
at band center to the average power within a 30KHz bandwidth at an 885KHz offset. Minimum CDMA output power is met with ACPR1 > 36dBc.
4. OIP3 specifications are achieved for power output levels of 27 and 30dBm per tone with tone spacing of 1.25MHz at band-center with adjusted supply and bias
conditions of Vdd = 6.5V and IdqTotal = 625mA (see Note 5).
5. VG1,2 and VG3 must be individually adjusted to achieve IDQ1,2 and IDQ3. A single VGG bias supply adjusted to achieve IDQTOTAL = 625mA can be used with
nearly equivalent performance. Values for IDQ1,2 and IDQ3 shown have been optimized for CDMA operation. IDQ1, 2 and IDQ3 (or IDQTOTAL) can be adjusted
to optimize the linearity of the amplifier for other modulation systems.
The device requires external input and output matching to 50as shown in Figure 3 and the Parts List.
©2003 Fairchild Semiconductor Corporation
RMBA19500 Rev. C

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