S3C2440 데이터 시트보기 (PDF) - Samsung

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S3C2440

32-BIT CMOS MICROCONTROLLER

Samsung 

Table of Contents (Continued)

Chapter 7

Clock & Power Management

Overview .............................................................................................................................................7-1

Functional Description .........................................................................................................................7-2

Clock Architecture.......................................................................................................................7-2

Clock Source Selection................................................................................................................7-2

Phase Locked Loop (PLL) ............................................................................................................7-4

Clock Control Logic .....................................................................................................................7-6

Power Management .....................................................................................................................7-10

Clock Generator & Power Management Special Register ........................................................................7-20

Lock Time Count Register (LOCKTIME).........................................................................................7-20

PLL Control Register (MPLLCON & UPLLCON)..............................................................................7-21

PLL Value Selection Table ...........................................................................................................7-21

Clock Control Register (CLKCON).................................................................................................7-22

Clock Slow Control (CLKSLOW) Register ......................................................................................7-23

Clock Divider Control (CLKDIVN) Register......................................................................................7-24

Camera Clock Divider (CAMDIVN) Register....................................................................................7-25

Chapter 8

DMA

Overview .............................................................................................................................................8-1

DMA Request Sources ........................................................................................................................8-2

DMA Operation ...................................................................................................................................8-2

External DMA DREQ/DACK Protocol ............................................................................................8-3

Examples ...........................................................................................................................................8-6

DMA Special Registers ........................................................................................................................8-7

DMA Initial Source (DISRC) Register.............................................................................................8-7

DMA Initial Source Control (DISRCC) Register ...............................................................................8-7

DMA Initial Destination (DIDST) Register .......................................................................................8-8

DMA Initial Destination Control (DIDSTC) Register..........................................................................8-8

DMA Control (DCON) Register......................................................................................................8-9

DMA Status (DSTAT) Register......................................................................................................8-12

DMA Current Source (DCSRC) Register ........................................................................................8-13

Current Destination (DCDST) Register ...........................................................................................8-13

DMA Mask Trigger (DMASKTRIG) Register....................................................................................8-14

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S3C2440A MICROCONTROLLER

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