SSD1905 데이터 시트보기 (PDF) - Unspecified

부품명

상세내역

제조사

SSD1905

LCD Graphics Controller CMOS

Unspecified 

List of Figures

Figure 4-1 : Block Diagram ........................................................................................................................... 4

Figure 4-2 : Pinout Diagram – 100 pin TQFP ............................................................................................... 5

Figure 7-1 : Display Data Byte/Word Swap ................................................................................................ 33

Figure 7-2 : PWM Clock/CV Pulse Block Diagram ..................................................................................... 46

Figure 10-1 : Clock Input Requirements ..................................................................................................... 62

Figure 10-2 : Generic #1 Interface Timing .................................................................................................. 64

Figure 10-3 : Generic #2 Interface Timing .................................................................................................. 66

Figure 10-4 : Motorola MC68K #1 Interface Timing.................................................................................... 68

Figure 10-5 : Motorola DragonBall Interface with DTACK# Timing ............................................................ 70

Figure 10-6 : Motorola DragonBall Interface without DTACK# Timing ....................................................... 72

Figure 10-7 : Hitachi SH-3 Interface Timing................................................................................................ 74

Figure 10-8 : Hitachi SH-4 Interface Timing................................................................................................ 76

Figure 10-9 : Passive/TFT Power-On Sequence Timing ............................................................................ 78

Figure 10-10 : Passive/TFT Power-Off Sequence Timing .......................................................................... 79

Figure 10-11 : Power Saving Status Timing ............................................................................................... 80

Figure 10-12 : Panel Timing Parameters................................................................................................ 81

Figure 10-13 : Generic STN Panel Timing ............................................................................................. 83

Figure 10-14 : Monochrome 4-Bit Panel Timing .................................................................................... 84

Figure 10-15 : Monochrome 4-Bit Panel A.C. Timing ........................................................................... 85

Figure 10-16 : Monochrome 8-Bit Panel Timing .................................................................................... 87

Figure 10-17 : Monochrome 8-Bit Panel A.C. Timing ........................................................................... 88

Figure 10-18 : Color 4-Bit Panel Timing.................................................................................................. 90

Figure 10-19 : Color 4-Bit Panel A.C. Timing......................................................................................... 91

Figure 10-20 : Color 8-Bit Panel Timing (Format stripe) ...................................................................... 93

Figure 10-21 : Color 8-Bit Panel A.C. Timing (Format stripe).............................................................. 94

Figure 10-22 : Generic TFT Panel Timing .............................................................................................. 96

Figure 10-23 : 12-Bit TFT Panel Timing.................................................................................................. 97

Figure 10-24 : TFT A.C. Timing................................................................................................................ 99

Figure 10-25 : 160x160 Sharp HR-TFT Panel Horizontal Timing ..................................................... 101

Figure 10-26 : 160x160 Sharp HR-TFT Panel Vertical Timing.......................................................... 103

Figure 10-27 : 320x240 Sharp HR-TFT Panel Horizontal Timing ..................................................... 105

Figure 10-28 : 320x240 Sharp HR-TFT Panel Vertical Timing.......................................................... 106

Figure 11-1 : Clock Generator Block Diagram..................................................................................... 107

Figure 14-1 : 1/2/4/8/16 Bit-Per-Pixel Display Data Memory Organization .............................................. 111

Figure 15-1 : 1 Bit-per-pixel Monochrome Mode Data Output Path ................................................. 112

Figure 15-2 : 2 Bit-per-pixel Monochrome Mode Data Output Path ................................................. 112

Figure 15-3 : 4 Bit-per-pixel Monochrome Mode Data Output Path ................................................. 113

Figure 15-4 : 8 Bit-per-pixel Monochrome Mode Data Output Path ................................................. 113

Figure 15-5 : 1 Bit-Per-Pixel Color Mode Data Output Path.............................................................. 114

Figure 15-6 : 2 Bit-Per-Pixel Color Mode Data Output Path.............................................................. 115

Figure 15-7 : 4 Bit-Per-Pixel Color Mode Data Output Path.............................................................. 116

Figure 15-8 : 8 Bit-per-pixel Color Mode Data Output Path............................................................... 117

Figure 16-1 : Byte-swapping for 16 Bpp ............................................................................................... 118

Figure 16-2 : Byte-swapping for 1/2/4/8 Bpp ....................................................................................... 119

Figure 17-1 : Main Window inside Virtual Image Area.............................................................................. 120

Figure 18-1 : Relationship Between The Screen Image and the Image Refreshed in 90° Display Rotate

Mode. ................................................................................................................................................. 121

Figure 18-2 : Relationship Between The Screen Image and the Image Refreshed in 180° Display Rotate

Mode. ................................................................................................................................................. 122

vi

Share Link: