STLC2410B 데이터 시트보기 (PDF) - STMicroelectronics
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STLC2410B Datasheet PDF : 20 Pages
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STLC2410B
Table 8. Pin List
Name Pin #
Description
DIR PU/PD VDD
PAD
Interface to external memory
int1
D2 External Interrupt used also as external wakeup
I
(1)
CMOS, 3.3V TTL
int2
D1 Second external interrupt
V1
compatible
I
(1)
schmitt trigger
boot
wait
G14 Select external boot from EMI or internal from ROM I
H12 EMI external wait signal (left open)
I
(1)
V2
PD
CMOS 1.8V
rdn
P1 External read
O
wrn
N2 External write
O
csn0
P2 External chip select bank 0
O
csn1
M3 External chip select bank 1
O
csn2
N3 External chip select bank 2
O
addr0
P3 External address bit 0
O
addr1
P4 External address bit 1
O
addr2
M5 External address bit 2
O
addr3
N5 External address bit 3
O
addr4
P5 External address bit 4
O
addr5
M6 External address bit 5
O
addr6
addr7
addr8
N6 External address bit 6
P6 External address bit 7
P7 External address bit 8
O
CMOS 1.8V
O
V2
4mA
slew rate control
O
addr9
N7 External address bit 9
O
addr10
M7 External address bit 10
O
addr11
P8 External address bit 11
O
addr12
N8 External address bit 12
O
addr13
M8 External address bit 13
O
addr14
P9 External address bit 14
O
addr15
P10 External address bit 15
O
addr16
N10 External address bit 16
O
addr17
M10 External address bit 17
O
addr18
P11 External address bit 18
O
addr19
N11 External address bit 19
O
data0
M11 External data bit 0
I/O
PD
data1
P12 External data bit 1
I/O
PD
data2
data3
N12 External data bit 2
P14 External data bit 3
I/O
I/O
PD
PD
V2
CMOS 1.8V 4mA
slew rate control
data4
N13 External data bit 4
I/O
PD
data5
N14 External data bit 5
I/O
PD
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