UDA1320ATS 데이터 시트보기 (PDF) - Philips Electronics

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UDA1320ATS

Low-cost stereo filter DAC

Philips Electronics 

Philips Semiconductors

Low-cost stereo filter DAC

Preliminary specification

UDA1320ATS

handbook, full pagewidth

L3MODE

tstp(L3)

L3CLK

L3DATA

address

data byte #1

data byte #2

Fig.5 Multi-byte transfer.

address

MBK074

handbook, full pagewidth

L3MODE

tstp(L3)

tsu(L3)D

L3CLCK

tCLK(L3)H

tCLK(L3)L

Tcy(CLK)L3

L3DATA

write

th(L3)DA

BIT 0

tsu(L3)DA

Fig.6 Timing for data transfer mode.

tstp(L3)

th(L3)D

th(L3)DA

BIT 7

MBK073

The sound feature values are stored in independent

registers. The first selection of the registers is achieved by

the choice of data type that is transferred (‘STATUS’ or

‘DATA’ transfer). This is performed in the address mode

using bit 1 and bit 0, see Table 4,. The settings that can be

controlled with ‘STATUS’ transfer are given in table 5, and

the settings that can be controlled using ‘DATA’ transfer

are given in table 6.

The second selection is performed by the 2 MSBs of the

data byte (bit 7 and bit 6). The other bits in the data byte

(bit 5 to bit 0) is the value that is placed in the selected

registers.

2000 Jan 10

9

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