UPC4061C 데이터 시트보기 (PDF) - NEC => Renesas Technology
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UPC4061C Datasheet PDF : 12 Pages
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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC4061
J-FET INPUT LOW-POWER OPERATIONAL AMPLIFIER
DESCRIPTION
The µPC4061 is a J-FET input low-power operational amplifier featuring low supply voltage operation from ±2 V.
Supply current is ten times smaller than µPC4081 type J-FET input op-amp. With very low input bias current
characteristics, the µPC4061 is an excellent choice for hand-held measurement equipment and other low-power
application circuits.
FEATURES
• Low supply current: 220 µA (TYP.)
• Very low input bias and offset currents
• Offset voltage null capability
• High input impedance...J-FET Input Stage
• Low supply voltage operation
• Output short circuit protection
• Internal frequency compensation
ORDERING INFORMATION
Part Number
µPC4061C
µPC4061G2
Package
8-pin plastic DIP (7.62 mm (300))
8-pin plastic SOP (5.72 mm (225))
EQUIVALENT CIRCUIT
V+
R1
R4
R9
(7)
Q5
Q9
Q14
(2)
II
IN
(3)
Q1 Q2
Q8 Q12
Q10
R5
C1
Q3
(1)
Q4
Q7
(5)
Q6
OFFSET
NULL
OFFSET
NULL
R6
R2
R3
Q11
Q16
R8
R7
Q13
OUT
(6)
Q15
Q17
Q18
Q20
Q19
(4)
_
V
PIN CONFIGURATION (Top View)
µPC4061C, 4061G2
OFFSET
NULL
1
8 NC
II 2
IN 3
_+
7 V+
6 OUT
_
V4
5
OFFSET
NULL
Remark NC : No Connection
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G15038EJ3V0DS00 (3rd edition)
(Previous No. IC-1990)
The mark 5 shows major revised points.
©
Date Published August 2000 NS CP(K)
Printed in Japan
1987
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