WM9701 데이터 시트보기 (PDF) - Wolfson Microelectronics plc
부품명
상세내역
제조사
WM9701 Datasheet PDF : 24 Pages
| |||
WM9701A
Production Data
SLOT 1: COMMAND ADDRESS PORT
The command port is used to control features, and monitor status for WM9701A functions including,
but not limited to, mixer settings, and power management (refer to the register section). The control
interface architecture supports up to 64, 16-bit read/write registers, addressable on even byte
boundaries. Only the even registers (00h, 02h, etc.) are valid, odd register (01h, 03h, etc.) accesses
are discouraged (if supported they should default to the preceding even byte boundary - i.e. a read to
01h will return the 16-bit contents of 00h. WM9701A’s control register file is nonetheless readable as
well as writeable to provide more robust testability.
Audio output frame slot 1 communicates control register address, and read/write command
information to WM9701A.
SYNC
BIT_CLK
TAG PHASE
12.288MHz
81.4nS
DATA PHASE
20.8µS (48kHz)
SDATA_IN
CODEC
READY
SLOT(1)
SLOT(2)
SLOT(12) ’0’ ’0’ ’0’ 19
0
END OF PREVIOUS
AUDIO FRAME
TIME SLOT ’VALID’ BITS
(’1’ = TIME SLOT CONTAINS
VALID PCM DATA)
SLOT (1)
19
0
SLOT (2)
19
0
SLOT (3)
19
0
SLOT (12)
Figure 10 AC-link Audio Input Frame
COMMAND ADDRESS PORT BIT ASSIGNMENTS
Bit(19)
Read/write command (1 = read, 0 = write)
Bit(18:12)
Bit(11:0)
Control register index (64 16-bit locations, addressed
on even byte boundaries)
Reserved (stuffed with 0s)
The first bit (MSB) sampled by WM9701A indicates whether the current control transaction is a read
or write operation. The following 7 bit positions communicate the targeted control register address.
The trailing 12 bit positions within the slot are reserved and must be stuffed with 0s by the AC’97
controller.
SLOT 2: COMMAND DATA PORT
The command data port is used to deliver 16-bit control register write data in the event that the
current command port operation is a write cycle. (As indicated by slot 1, bit 19)
Bit(19:4)
Bit(3:0)
Control register write data (stuffed with 0s if current
operation is a read)
Reserved (stuffed with 0s)
If the current command port operation is a read then the entire time slot must be stuffed with 0s by
the AC’97 controller.
SLOT 3: PCM PLAYBACK LEFT CHANNEL
Audio output frame slot 3 is the composite digital audio left playback stream. In a typical ‘Games
Compatible’ PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the
AC’97 controller or host processor) with music synthesis output samples. If a sample stream of
resolution less than 20-bits is transferred, the AC’97 controller must stuff all trailing non-valid bit
positions within this time slot with 0s.
SLOT 4: PCM PLAYBACK RIGHT CHANNEL
Audio output frame slot 4 is the composite digital audio right playback stream. In a typical ‘Games
Compatible’ PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the
AC’97 controller or host processor) with music synthesis output samples.
WOLFSON MICROELECTRONICS LTD.
PD Rev 3.2 January 2001
12
Share Link: 