WS1403-TR1 데이터 시트보기 (PDF) - Avago Technologies
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WS1403-TR1 Datasheet PDF : 15 Pages
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5.00
4.50
4.00
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0
-50
CDG Urban
CDG Suburban
-40
-30
Conventional PAM
-20
-10
0
10
PA Out (dBm)
Digitally Controlled PAM
Figure 13. CDMA power distribution function
700
600
500
400
300
200
100
0
20
30
Cool PAM
Average Current & Talk Time
Probability Distribution Function implies that what is
important for longer talk time is the efficiency of low
or medium power range rather than the efficiency at
full power. WS1403 idle current is 12 mA and operating
current at 17 dBm is 65 mA at nominal condition. This PA
with low current consumption prolongs talk time by no
less than 30 minutes compared to other PAs.
Average current = ∫(PDF x Current)dp
PCB Design Guidelines
The recommended WS1403 PCB land pattern is shown
in Figure 14 and Figure 15. The substrate is coated with
solder mask between the I/O and conductive paddle to
protect the gold pads from short circuit that is caused by
solder bleeding/bridging.
Stencil Design Guidelines
A properly designed solder screen or stencil is required
to ensure optimum amount of solder paste is deposited
onto the PCB pads.
The recommended stencil layout is shown in Figure 16.
Reducing the stencil opening can potentially generate
more voids. On the other hand, stencil openings larger
than 100% will lead to excessive solder paste smear or
bridging across the I/O pads or conductive paddle to
adjacent I/O pads. Considering the fact that solder paste
thickness will directly affect the quality of the solder
joint, a good choice is to use laser cut stencil composed
of 0.100 mm (4 mils) or 0.127 mm (5 mils) thick stainless
steel which is capable of producing the required fine
stencil outline.
0.6
0.4
∅ 0.3 mm ON
0.5 mm PITCH
0.7
0.5
0.1
0.6
0.55
0.4
1.325
0.5
1.05
0.8
0.5
0.25
Figure 14. Metallization
0.8
1.4
Figure 15. Solder mask opening
0.8
1.1
Figure 16. Solder paste stencil aperture
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