MCZ33291EG 데이터 시트보기 (PDF) - Freescale Semiconductor
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MCZ33291EG Datasheet PDF : 27 Pages
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ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ≤ VDD ≤ 5.5 V, 9.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TA ≤ 125°C, unless otherwise noted.
Typical values noted reflect the approximate value with VBAT = 13 V, TA = 25°C.
Characteristic
Symbol
Min
Typ
Max
Unit
Output OFF Open Load Detect Current (21)
Output Programmed OFF, VOUT = 0.6 VDD
IOCO
μA
30
50
100
Output Clamp Voltage
2.0 mA < IOUT < 200 mA
Output Leakage Current (VDD < 2.0 V) (22)
Overtemperature Shutdown (Outputs OFF) (23)
Overtemperature Shutdown Hysteresis (23)
DIGITAL INTERFACE
VOK
45
53
IOUT(LKG)
-25
0
TLIM
155
180
TLIM(HYS)
–
10
V
65
25
μA
–
°C
20
°C
Input Logic High Voltage (24)
Input Logic Low Voltage (24)
Input Logic Threshold Hysteresis (SCLK, RST, and SFPD) (25)
V IH
0.7
–
1.0
VDD
V IL
0
–
0.2
VDD
VI (HYS)
50
100
500
mV
SI Pull-Up Current (SI = 0 V)
ISI
0
10
20
μA
CS Pull-Up Current (CS = 0 V)
ICS
0
10
20
μA
SCLK Pull-Down Current (SCLK = 5.0 V)
ISCLK
0
10
20
μA
RST Pull-Down Current (RST = 5.0 V)
I RST
5.0
25
50
μA
SFPD Pull-Down Current (SFPD = 5.0 V)
ISFPD
5.0
10
25
μA
SO High-State Output Voltage (IOH = 1.0 mA)
VSOH
VDD - 0.4 V VDD - 0.2 V
–
V
SO Low-State Output Voltage (IOL = -1.6 mA)
VSOL
–
0.2
0.4
V
SO Tri-State Leakage Current (CS = 0.7 VDD, 0 V < VSO < VDD)
Input Capacitance (0 V < VDD < 5.5 V) (26)
SO Tn-State Capacitance (0 V < VDD < 5.5 V) (27)
ISOT
-10
0
10
μA
CIN
–
–
12
pF
CSOT
–
–
20
pF
Notes
21. Output OFF Open Load Detect Current is the current required to flow through the load for the purpose of detecting the existence of an
open load condition when the specific output is commanded to be OFF.
22. Output leakage current measured with the output OFF and at 16 V.
23. This parameter is guaranteed by design, but it is not production tested.
24. Upper and lower logic threshold voltage levels apply to SI, CS, SCLK, RST, and SFPD inputs.
25. Hysteresis is characterized, but it is not production tested.
26. Input capacitance of SI CS, SCLK, RST, and SFPD for 0 V < VDD < 5.5 V. This parameter is guaranteed by design, but it is not production
tested.
27. Tri-state capacitance of SO for 0 V < VDD < 5.5 V. This parameter is guaranteed by design, but it is not production tested.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33291
7
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