68HC705JB3 데이터 시트보기 (PDF) - Freescale Semiconductor

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68HC705JB3

8-bit microcontroller units (MCUs)

Freescale Semiconductor 

Freescale Semiconductor, Inc.

November 5, 1998 GENERAL RELEASE SPECIFICATION

Section

TABLE OF CONTENTS

Page

SECTION 1

GENERAL DESCRIPTION

1.1 FEATURES ...................................................................................................... 1-1

1.2 MASK OPTIONS.............................................................................................. 1-2

1.3 MCU STRUCTURE.......................................................................................... 1-2

1.4 FUNCTIONAL PIN DESCRIPTION.................................................................. 1-4

1.4.1

1.4.2

VDD and VSS ................................................................................................ 1-4

OSC1, OSC2 ............................................................................................... 1-4

1.4.3 RESET......................................................................................................... 1-6

1.4.4 IRQ .............................................................................................................. 1-6

1.4.5 3.3V ............................................................................................................. 1-6

1.4.6 D+ and D– ................................................................................................... 1-6

1.4.7 PA0-PA7 ...................................................................................................... 1-6

1.4.8 PB0-PB2, PB3-PB7 ..................................................................................... 1-7

1.4.9 PC0-PC3...................................................................................................... 1-7

SECTION 2

MEMORY

2.1 I/O AND CONTROL REGISTERS ................................................................... 2-2

2.2 RAM ................................................................................................................. 2-2

2.3 ROM................................................................................................................. 2-2

2.4 I/O REGISTERS SUMMARY ........................................................................... 2-3

SECTION 3

CENTRAL PROCESSING UNIT

3.1 REGISTERS .................................................................................................... 3-1

3.2 ACCUMULATOR (A)........................................................................................ 3-2

3.3 INDEX REGISTER (X) ..................................................................................... 3-2

3.4 STACK POINTER (SP) .................................................................................... 3-2

3.5 PROGRAM COUNTER (PC) ........................................................................... 3-2

3.6 CONDITION CODE REGISTER (CCR) ........................................................... 3-3

3.6.1 Half Carry Bit (H-Bit) .................................................................................... 3-3

3.6.2 Interrupt Mask (I-Bit) .................................................................................... 3-3

3.6.3 Negative Bit (N-Bit) ...................................................................................... 3-3

3.6.4 Zero Bit (Z-Bit) ............................................................................................. 3-3

3.6.5 Carry/Borrow Bit (C-Bit) ............................................................................... 3-4

SECTION 4

INTERRUPTS

4.1 INTERRUPT VECTORS .................................................................................. 4-1

4.2 INTERRUPT PROCESSING............................................................................ 4-2

4.3 RESET INTERRUPT SEQUENCE .................................................................. 4-4

4.4 SOFTWARE INTERRUPT (SWI) ..................................................................... 4-4

MC68HC05JB3

REV 1

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