DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ATA6660 데이터 시트보기 (PDF) - Atmel Corporation

부품명
상세내역
제조사
ATA6660
Atmel
Atmel Corporation Atmel
ATA6660 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ATA6660
3. Functional Description
The ATA6660 is a monolithic circuit based on Atmel’s Smart Power BCD60-III technology. It is
especially designed for high-speed differential mode data transmission in harsh environments
like automotive and industrial applications. Baudrate can be adjusted up to 1 Mbaud. The
ATA6660 is fully compatible to the ISO11898, the developed standard for high speed CAN-C
(Controller Area Network) communication.
3.1 Voltage Protection and ESD
High voltage protection circuitry on both line pins, CANH (pin 7) and CANL (pin 6), allow bus line
voltages in the range of –40V to +40V. ESD protection circuitry on line pins allow HBM = 8 kV,
MM = 300V. The implemented high voltage protection on bus line output/input pins (7/6) makes
the ATA6660 suitable for 12V automotive applications as well as 24V automotive applications.
3.2 Slope Control
A fixed slope is adjusted to prevent unsymmetrical transients on bus lines causing EMC prob-
lems. Controlled bus lines, both CANH and CANL signal, will reduce radio frequency
interference to a minimum. In well designed bus configurations the filter design costs can be
reduced dramatically.
3.3 Overcurrent Protection
In the case of a line shorts, like CANH to GND, CANL to VCC, integrated short current limitation
allows a maximum current of ICANH_SC or ICANL_SC. If junction temperature rises above 165°C an
internal overtemperature protection circuitry shuts down both output stages, the receiver will
stay activated.
3.4 Standby Mode
The ATA6660 can be switched to Standby Mode by forcing the voltage VRS > 0.87 × VCC. In
Standby Mode the supply current will reduce dramatically, supply current during Standby Mode
is typical 600 µA (IVCC_stby). Transmitting data function will not be supported, but the opportunity
will remain to receive data. A high-speed comparator is listening for activities on the bus. A dom-
inant bus signal will force the output RXD to a low level in typical tdRXDL = 400 ns. If the RS pin is
not connected, causing through a broken connection to the controller, the ATA6660 will switch to
Standby Mode automatically.
3.5 High-speed Receiver
In Normal Mode a fast receiver circuitry combined with a resistor network is able to detect differ-
ential bus line voltages Vrec_th > 0.9V as dominant bit, differential bus line voltages Vrec_th < 0.5V
as recessive bit.
The wide receiver common mode range, –10V to +10V, combined with a symmetrical differential
receiver stage offers high immunity against electromagnetic interference. A typical hysteresis of
70 mV is implemented. Dominant differential bus voltages forces RXD output (pin 4) to low level,
recessive differential bus voltages to high level.
3
4582E–AUTO–02/08

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]