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ATA6660 데이터 시트보기 (PDF) - Atmel Corporation

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ATA6660
Atmel
Atmel Corporation Atmel
ATA6660 Datasheet PDF : 13 Pages
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3.6 TXD Input
The input stage pin 1 (TXD) is compatible for 3.3V output levels from new controller families.
Pull-up resistance (25 k) forces the IC to Recessive Mode, if TXD-Pin is not connected. TXD
low signal drives the transmitter into dominant state.
3.7 Transmitter
A integrated complex compensation technique allows stable data transmission up to 1 MBaud.
Low level on TXD input forces bus line voltages CANH to 3.5V, CANL to 1.5V with a termination
resistor of 60. In the case of a line short circuit, like CANH to GND, CANL to VCC, integrated
short current limitation circuitry allows a maximum current of 150 mA. If junction temperature
rises above typical 163°C an internal overtemperature protection shuts down both output stages,
the Receive Mode will stay activated.
3.8 Split Termination Concept
With a modified bus termination (see Figure 8-3 on page 10) a reduction of emission and a
higher immunity of the bus system can be achieved. The one 120resistor at the bus line end
nodes is split into two resistors of equal value, i.e., two resistors of 60. The resistors for the
stub nodes is recommended with two resistors of 1.3 k. (for example 8 stub nodes and 2 bus
end nodes) Notice: The bus load of all the termination resistors has to stay within the range of
50to 65.
The common mode signal at the centre tap of the termination is connected to ground via a
capacitor of e.g., Csplit = 10 nF to 100 nF. A separate ground lead to the ground pin of the mod-
ule connector is recommended.
4 ATA6660
4582E–AUTO–02/08

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