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BTS840S2 데이터 시트보기 (PDF) - Infineon Technologies

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BTS840S2 Datasheet PDF : 15 Pages
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BTS 840 S2
Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and
channel 2
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IN
Figure 2a: Switching a resistive load,
turn-on/off time and slew rate definition:
IN
ST
t don(ST)
VOUT
t on
IL
tslc(IS)
t doff(ST)
t off
t slc(IS)
VOUT
90%
t on
dV/dton
10%
Load 1
Load 2
IIS
tson(IS)
t
t soff(IS)
The sense signal is not valid during settling time after turn or
change of load current.
Figure 1b: Vbb turn on:
IN1
IL
Figure 2b: Switching a lamp:
IN
IN2
ST
V bb
V
OUT1
V
OUT2
ST1 open drain
V
OUT
I
L
dV/dtoff
toff
t
ST2 open drain
proper turn on under all conditions
Infineon technologies
t
t
The initial peak current should be limited by the lamp and not by
the current limit of the device.
11
2003-Oct-01

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