C1851BCU 데이터 시트보기 (PDF) - NEC => Renesas Technology

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C1851BCU

I2C BUS-COMPATIBLE US MTS PROCESSING LSI

NEC => Renesas Technology 

µPC1851B

BLOCK DIAGRAM

9V

VCC 1

2.2 µ F

TLO 31

2200 pF

0.1µ F

LTC 32

LBC 33

10µ F

LOT

26

10µ F

ROT

25

Volume Control

Tone Control

Surround Block

21 AGND

D/A

2.2 µ F

28 TRO2200 pF

29 RTC 0.1µ F

30 RBC

0.022 µ F

27 SUR

FOR 40

FOL 41

EL2 37

EL1 39

ER2 36

ER1 38

MOL 35

MOR 34

Filter

Selector Block

Matrix Block

Filter

Control

D/A

Offset

1µ F

Absorption

MOA 42

De-

emphasis

dbx Noise

Reduction Block

22 µ F

VRE 2

1/2VCC

L+R

LPF Switch

0.1µ F

PD2 4

PD1 3

1 kΩ 1µ F

φ D1 5

4.7µ F

φ D2 6

SDA 22

SCL 23

DGND 24

Stereo

Demodulation

Block

SAP

Demodulation

Block

I2C Bus

Interface

Input Attenuator

D/A

4.7µ F

19

VOL-C

1µ F

20 VOA

10 µ F

16 WTI**

5.1 kΩ

1µF

17

WRB 3.3 µ F

13 STI**

3 kΩ

1µ F

14

SRB 1µ F

18 dO

16.6 kΩ

15

ITI*

11 SI

0.1 µ F

10 SOT

I2C Bus

Interface

68 kΩ

Noise

BPF

Noise

Detector

9 NDT

0.47µ F

7

COM

12

8

SOA SDT

2.2µ F

0.1µF 0.047µ F

Remark Use the followings for external parts.

Resistor (*): Metal film resistor (± 1 %). Unless otherwise specified; ±5 %

Capacitors (**): Tantalum capacitor (±10 %). Unless otherwise specified; ±20 %

Data Sheet S13417EJ2V0DS00

3

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