UPC1851B 데이터 시트보기 (PDF) - NEC => Renesas Technology

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UPC1851B

I2C BUS-COMPATIBLE US MTS PROCESSING LSI

NEC => Renesas Technology 

µPC1851B

dbx NOISE REDUCTION BLOCK

From Switch

LPF

fH Trap

408-Hz LPF

Variable

Emphasis

2.19-kHz LPF

Offset

Absorption

18

dO

2 fH Trap

Spectral RMS Filter

Wide-band RMS

Filter

D/A

Spectral

RMS

Timing Current

D/A

Wide-band

RMS

14 13

SRB STI

Wide-band VCA

Offset

Absorption

To Matrix Block

15

17 16

ITI

WRB WTI

20

VOA

SELECTOR BLOCK

From Matrix Block

(L-channel signal)

From Matrix Block

(R-channel signal)

ER1 ER2

38 36

EL1 EL2

39 37

Switch Note1

Note2

40 kΩ 40 kΩ

40 kΩ

–

+

Note2 40 kΩ

To Surround Block

Switch (Monaural/Stereo)

To Surround Block

Notes 1. Switch (TV signal/External input 1/External input 2).

2. The input gain 0 dB/6 dB can be selected by the command of the I2C bus (refer to 4.3 (5) Input gain).

Data Sheet S13417EJ2V0DS00

5

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