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MT48H16M16LFF-8 데이터 시트보기 (PDF) - Micron Technology

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MT48H16M16LFF-8
Micron
Micron Technology Micron
MT48H16M16LFF-8 Datasheet PDF : 58 Pages
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Thus, during ambiant temperatures, the power con-
sumed during refresh was unnecessarily high, because
the refresh rate was set to accommodate the higher
temperatures. Setting M4 and M3, allow the DRAM to
accomodate more specific temperature regions during
SELF REFRESH. There are four temperature settings,
which will vary the SELF REFRESH current according to
the selected temperature. This selectable refresh rate
will save power when the DRAM is operating at normal
temperatures.
PARTIAL ARRAY SELF REFRESH
For further power savings during SELF REFRESH,
the PASR feature allows the controller to select the
amount of memory that will be refreshed during SELF
REFRESH. The refresh options are Four Bank;all four
banks, Two Bank;banks 0 and 1, One Bank;bank 0, Half
Bank; bank 0 with row address MSB 0; Quarter Bank;
bank 0 with row address 2 MSB’s 0. WRITE and READ
commands can still occur during standard operation,
but only the selected banks will be refreshed during
SELF REFRESH. Data in banks that are disabled will be
lost.
ADVANCE
256Mb: x16
MOBILE SDRAM
DEEP POWER DOWN
Deep Power Down is an operating mode to achieve
maximum power reduction by eliminating the power
of the whole memory array of the devices. Data will not
be retained once the device enters Deep Power Down
Mode.
This mode is entered by having all banks idle then
/CS and /WE held low with /RAS and /CAS held high at
the rising edge of the clock, while CKE is low. This mode
is exited by asserting CKE high.
DRIVER STRENGTH
Bit A5 of the extended mode register can be used to
select the driver strength of the DQ outputs. This value
should be set according to the applications require-
ments. Full drive strength is suitable to drive outputs
on systems in which the SDRAM component is placed
on a module. Full drive strength will drive loads up to
50pF.
The half-drive strength can be used for point-to-
point applications. Point-to-point systems are usually
lightly loaded with a memory controller accessing one
to eight SDRAM components on the memory bus with
module stubs between these devices. Driver strength
chosen should be load dependent. The lighter the load,
the less driver strength that is needed for the outputs.
256Mb: x16 Mobile SDRAM
MobileRamY26L_A.p65 – Pub. 5/02
10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.

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