HY27SS(08/16)561M 데이터 시트보기 (PDF) - Hynix Semiconductor
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HY27SS(08/16)561M Datasheet PDF : 44 Pages
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HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Table 6: Status Register Bit
Bit
NAME
SR7
Write Protection
SR6
SR5
SR4, SR3, SR2
SR0
Program/Erase/Read
Controller
Program/ Erase/ Read
Controller
Reserved
Generic Error
Logic Level
'1'
'0'
'1'
'0'
'1'
'0'
Don't Care
'1'
'0'
Definition
Not Protected
Protected
P/E/R C Inactive, device ready
P/E/R C active, device busy
P/E/R C inactive, device ready
P/E/R C active, device busy
Error - Operation failed
No Error - Operation successful
Read Electronic Signature
The device contains a Manufacturer Code and Device Code. To read these codes two steps are required:
1. first use one Bus Write cycle to issue the Read Electronic Signature command (90h)
2. then subsequent Bus Read operations will read the Manufacturer Code and the Device Code until another command
is issued.
Refer to Table, Read Electronic Signature for information on the addresses.
Part Number
HY27US08561M
HY27SS08561M
HY27US16561M
HY27SS16561M
Manufacture Code
ADh
ADh
00ADh
00ADh
Device Code
75h
35h
0055h
0045h
Bus Width
x8
x8
x16
x16
Automatic Page 0 Read at Power-Up
Automatic Page 0 Read at Power-Up is an option available on all devices belonging to the NAND Flash 528 Byte/264
Word Page family. It allows the microcontroller to directly download boot code from page 0, without requiring any
command or address input sequence. The Automatic Page 0 Read option is particularly suited for applications that
boot from the NAND.
Devices delivered with Automatic Page 0 Read at Power-Up can have the Sequential Row Read option either enabled
or disabled.
Rev 0.7 / Oct. 2004
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