M52347SP 데이터 시트보기 (PDF) - Renesas Electronics

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M52347SP

SYNC SIGNAL PROCESSOR

Renesas Electronics 

M52347SP/FP

3) Polarity detection and non-input detection (pins 7 and 8)

External capacitance is required as a filter pin to detect polarity and non-input. As the value is larger, the ripple is

smaller and less malfunction occurs. However, the response speed for detection is lower. A sufficient external

capacitance is 0.05 µF with input of 15 kHz and 10 µF with input of 60 kHz. However, check the frequency of the

input signal in use and the filter pin waveform with the duty ratio conditions, and then check that the value is 3.1 V

or more (2.8 V in capability) with positive polarity input and 1.9 V or less (2.2 V in capability) with negative

polarity input.

4) V S/S IN (pin 11)

Input a signal of having externally integrated composite sync for V sync separation.

Composite sync input into pin 6 is output to pin 12. Output at 12 is externally integrated and is input into pin 11 for

V sync separation. With the waveform at pin 11, check that the H element has been fully dropped.

The threshold levels of sync separation, given hysteresis, are 3.5 V and 1.8 V.

Input waveform at

pin 6

Waveform at

pin 11

Output waveform at

pin 13

VTH = 3.5 V

VTH = 1.8 V

2. Clamp Pulse

1) Clamp pulse width

CLAMP TIMING (Pin 20)

The clamp pulse width is determined by the external resistance and the capacitance. As the resistance value and

capacitance value are larger, the clamp pulse width is wider.

The time constant is determined by the current flowing out of pin 20 and the capacitance value of the timing pin.

The flow current at pin 20 is determined by the pin voltage and external resistance value. When the external

resistance is 4.3 (that is 700 µA) and the external capacitance is 220 pF, the pulse width is 0.4 µs.

2) Clamp pulse position

CLAMP SW (pin 3)

When pin 3 is "M" or "L", fixing a higher-priority signal to the trailing edge results in occurrence of a clamp pulse.

When pin 3 is "H", and only GREEN is input, clamp pulse occurs at the trailing edge. A clamp pulse also occurs at

the leading edge when COMP/H only is input or when both COMP/H and GREEN are input.

8

7

6

5

4

R = 10 kΩ

3

2

R = 4.3 kΩ

1

0

10

100

1000

10000

Clamp Timing Capacitance at Pin 20 (pF)

Rev.2.00 Sep 14, 2006 page 12 of 16

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