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M52347SP 데이터 시트보기 (PDF) - Renesas Electronics

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M52347SP
Renesas
Renesas Electronics Renesas
M52347SP Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
M52347SP/FP
Application Example (fH = 50 kHz, fV = 80 Hz)
(POSI NON NEG)
(POSI NON NEG)
220 p
4.3 k
CLAMP
TIMING
V.POL. H.POL. CLAMP+
20
19
18 OUT 17
VCC 5 V
0.01 µ
+
47 µ HDHD+
OUT OUT
16
15
14
43 k 100 p
VD+
OUT
13
V S/S
OUT
12
V S/S
IN
11
CLAMP
GEN
EDGE
SW
V.TIME
GATE
V.SYNC
SEP
LOGIC
LOGIC
SYNC
SEP
H
H
SHAPE DET
V
V
SHAPE DET
1
2
H.STATE V.STATE
(POSI NON NEG)
(POSI NON NEG)
3
CLAMP
SW
H 56 k
M
L
4
1.0 µ
18 k
5
GND
6
7
8
4.7 µ COMP/H +
4.7 µ
DET 0.068 µ
9
V DET +
4.7 µ
18 k
10 µ
4.7 µ
10
V TIME GATE
SW
H
L
:5V
Units Resistance:
Capacitance: F
0.01 µ
3k
GREEN
IN
100
0.01 µ
3k
COMP/H
IN
100
V IN
Note:
External circuit for input of pins 6 and 8
When amplitude of up to 5 VP-P is entered into this circuit, can be kept constant at approx. 0.6 VP-P.
When the duty of input signal at pins 6 and 8 changes, the most broad support range is obtained
with amplitude of 0.6 VP-P.
Rev.2.00 Sep 14, 2006 page 15 of 16

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