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MAX16051ETI

Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability

Maxim Integrated 

MAX16050/MAX16051

Voltage Monitors/Sequencer Circuits with

Reverse-Sequencing Capability

Overvoltage Fault Output (OV_OUT)

The MAX16050/MAX16051 include an overvoltage fault

output. OV_OUT is an open-drain output and requires an

external pullup resistor. When any of the SET_ voltages

exceed their 0.55V overvoltage threshold, OV_OUT goes

low. When all of the SET_ voltages are below their over-

voltage threshold, OV_OUT goes high impedance after

a short propagation delay. To force OUT_ low during an

overvoltage condition, OV_OUT must be externally con-

nected to FAULT.

Discharge Inputs (DISC_)

The DISC_ inputs connect to sequenced power supply

outputs, and discharge power-supply capacitors during

a power-down or fault event. They monitor power-supply

output voltages during reverse sequencing. When an

OUT_ pin goes low, the associated DISC_ activates an

85mA pulldown current to discharge any output capaci-

tors. This helps the power-supply output drop below the

250mV level so the next power supply can be turned off.

During normal operation, DISC_ is high impedance and

will not load the circuit.

Bus Removal Output (REM)

The MAX16050/MAX16051 include an open-drain bus

removal output (REM) that indicates when it is safe to

disconnect the input power after a controlled power-down

operation. REM monitors DISC_ voltages and goes low

when any DISC_ input voltage goes above the DISC_

power low threshold (VTH_PL). REM goes high when all

DISC_ inputs are below the DISC_ power low threshold

(VTH_PL). For a visual signal of when it is unsafe to

remove a powered board from the bus, connect an LED

to REM.

Enable Hold Input (EN_HOLD)

When EN_HOLD is low, a high-to-low transition on SHDN

or on EN is ignored. EN_HOLD must be high for SHDN

or EN to disable the device. This feature is used when

multiple MAX16050/MAX16051s are daisy-chained (see

Figure 7). Connect EN_HOLD to ABP if not used.

Delay Time Input (DELAY)

Connect a capacitor (CDELAY) between DELAY and

GND to adjust the sequencing delay period (tDELAY) that

occurs between sequenced channels. Use the following

formula to estimate the delay:

tDELAY = 10μs + (500kΩ x CDELAY)

where tDELAY is in seconds and CDELAY is in Farads.

Leave DELAY unconnected for the default 10μs (typ)

delay.

Reset Timeout Input (TIMEOUT)

Connect a capacitor (CTIMEOUT) from TIMEOUT to GND

to set the reset timeout period. After all SET_ inputs

exceed their thresholds (VTH), RESET remains low for

the programmed timeout period, tRP, before deasserting

(see Figure 2). Use the following formula to estimate the

reset timeout period:

tRP = 10μs + (500kΩ x CTIMEOUT)

where tRP is in seconds and CTIMEOUT is in Farads.

Leave TIMEOUT unconnected for the default 10μs (typ)

timeout delay or connect TIMEOUT to ABP to enable a

fixed 128ms (typ) timeout.

Applications Information

Resistor Value Selection

The MAX16050/MAX16051 feature four and five SET_

inputs, respectively, and the threshold voltage (VTH) at

each SET_ input is 0.5V (typ). To monitor a voltage V1TH,

connect a resistive divider network to the circuit as shown

in Figure 6, and use the following equation to calculate the

monitored threshold voltage:

V1TH=

VTH

×

1

+

R1

R2 

Balance accuracy and power dissipation when choosing

the external resistors. The input to the voltage monitor is

a high-impedance input with a small 100nA leakage cur-

rent. This leakage current contributes to the overall error

of the threshold voltage, and this error is proportional to

the value of the resistors used to set the threshold. Small-

valued resistors reduce the error but increase the power

V1TH

R1

R2

VBUS

SET_

VCC

RESET

MAX16050

MAX16051

GND

Figure 6. Setting the SET_ Input

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