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MAX6850 데이터 시트보기 (PDF) - Maxim Integrated

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MAX6850 Datasheet PDF : 34 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
4-Wire Interfaced, 7-, 14-, and 16-Segment Alpha-
numeric Vacuum-Fluorescent Display Controller
a
f
b
g
e
c
dp
d
a
f h i jb
g1
g2
em l k c
dp
d
a1
a2
f h i jb
g1
g2
em l k c
dp
d1
d2
Figure 5. Segment Labeling for 7-, 14-, and 16-Segment Displays
blanking, and disables the tube driver in shutdown. The
controller multiplexes the display by enabling each grid
of the VFD in turn for 100µs (OSC = 4MHz) with the cor-
rect segment (anode) data. The data for the next grid is
transferred to the tube drivers during the display time of
the current grid.
The controller uses an internal output map to match any
tube-drivers shift-register grid/anode order, and is
therefore compatible with all VFD internal chip-in-glass
or external tube drivers.
The MAX6850 provides five high-current output ports,
which can be configured for a variety of functions.
The PUMP output can be configured as either an 80kHz
(OSC = 4MHz) clock intended for DC-DC converter
use, the 4-wire serial interfaces DOUT data output, or a
general-purpose logic output.
The PHASE1 and PHASE2 outputs can be individually
configured as either 10kHz PWM outputs (OSC =
4MHz) intended for filament driving, blink status out-
puts, or general-purpose logic outputs.
The PORT0 and PORT1 outputs can be individually
configured as either 625Hz, 1250Hz, or 2500Hz clocks
(OSC = 4MHz) intended for buzzer driving, the 4-wire
serial interfaces DOUT data output, blink or shutdown
status outputs, or general-purpose logic outputs. Figure
5 shows segment labeling for 7-, 14-, and 16-segment
displays. Figure 6 is a block diagram of the VFD tube
driver and VFD tube.
Display Modes
The MAX6850 has two display modes (Table 1), select-
ed by the M bit in the configuration register (Table 23).
The display modes trade the maximum allowable num-
VFCLK
VFDIN
VFLOAD
VFBLANK
VFD TUBE DRIVER
SERIAL-TO-PARALLEL SHIFT REGISTER
LATCHES
O0 O1 O2
O0 O1 O2
0n-2 0n-1 0n
0n-2 0n-1 0n
VFD TUBE SIMPLIFIED
Figure 6. Block Diagram of VFD Tube Driver and VFD Tube
ber of digits (96/2 mode) against the availability of
annunciator segments (48/1 mode). Table 2 is the reg-
ister address map.
Initial Power-Up
On initial power-up, all control registers are reset, the
display segment and annunciator data are cleared,
intensity is set to minimum, and shutdown is enabled
(Table 3).
8 _______________________________________________________________________________________

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