PTN3500 데이터 시트보기 (PDF) - Philips Electronics

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PTN3500

Maintenance and control device

Philips Electronics 

Philips Semiconductors

Maintenance and control device

Product specification

PTN3500

I2C-BUS TIMING CHARACTERISTICS

SYMBOL

PARAMETER

I2C-bus timing (see Figure 17; Note 1)

MIN.

TYP.

MAX.

UNIT

fSCL

SCL clock frequency

–

–

400

kHz

tSW

tolerable spike width on bus

–

–

50

ns

tBUF

bus free time

1.3

–

–

µs

tSU;STA

START condition set–up time

0.6

–

–

µs

tHD;STA

START condition hold time

0.6

–

–

µs

tr

SCL and SDA rise time

–

–

0.3

µs

tf

SCL and SDA fall time

–

–

0.3

µs

tSU;DAT

data set–up time

250

–

–

ns

tHD;DAT

data hold time

0

–

–

ns

tVD;DAT

SCL LOW to data out valid

–

–

1.0

µs

tSU;STO

STOP condition set–up time

0.6

–

–

µs

NOTE:

1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input

voltage swing of VSS to VDD.

handbook, full pagewidth START

PROTOCOL

CONDITION

(S)

t SU;STA

BIT 7

MSB

(A7)

SCL

t BUF

tr

SDA

BIT 6

(A6)

1 / f SCL

tf

BIT 0

LSB

(R/W)

ACKNOWLEDGE

(A)

STOP

CONDITION

(P)

t HD;STA

t SU;DAT

t HD;DAT

Figure 17.

t VD;DAT

MBD820

t SU;STO

SW00561

2001 Jan 17

10

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