S5L9290X 데이터 시트보기 (PDF) - Samsung

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S5L9290X

DIGITAL SIGNAL PROCESSOR FOR CDP

Samsung 

PRELIMINARY

S5L9290X

DIGITAL SIGNAL PROCESSOR FOR CDP

$88 Command

Digital PLL control

Data

Command Address

D7

D6

D5

D4

D3

D2

D1

D0

DPLL control 1

10001000

($88)

WIDE

PHASE

DET

PHASE

GAIN

DLF

GAIN

ACC3t

-

CO3T RETREF

Bit

Name

Data = 0

D7

WIDE

Normal

D6

PHASE-DET

Now

D5

PHASE-GAIN

1/2t

D4

DLF-GAIN

1/2^10

D3

ACC3t

ignore ± 3t

D2

-

-

D1

CO3T

Normal

D0

REFRET

± 1.1%

$89 Command

Digital PLL control

Command Address

DPLL control 2

10001001

($89)

D7

D6

REF98[1:0]

Data = 1

Wide

new

1t

1/2^9

accept ± 3t

-

3T

± 2.3%

Comment

Wide mode selection

Phase detection method selection (option)

Phase Adjust gain selection (option)

Digital loop filter gain selection (option)

ROM coefficient selection (option)

-

3T correction (option)

Reference when return to M1 = 98

Data

D5

D4

D3

D2

REF[1:0]

MAXTGAIN[1:0]

D1

D0

CAPRANGE[1:0]

Bits

D[7:6]

D[5:4]

D[3:2]

D[1:0]

Name

Data = 00 Data = 01 Data = 10 Data = 11

Comment

REF98[1:0]

± 1.7% ± 2.3% ± 3.4% ± 4.6% Outward reference when M1 = 98

REF[1:0]

± 1.7% ± 2.3% ± 3.4% ± 4.6% Outward reference when M1≠ 98

MAXTGAIN[1:0]

1

1/2

1/4

1/8 MAX T accumulation gain

CAPRANGE[1:0] 50%

40%

30%

20% Capture range selection

12

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