SC220Q 데이터 시트보기 (PDF) - Semtech Corporation
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SC220Q Datasheet PDF : 14 Pages
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SC220 x
SC220Q
Applications Information (Cont.)
PCB Layout Considerations
Fundamental layout rules must be followed since the
layout is critical for achieving the desirable performance.
Poor layout can degrade the performance of the DC-DC
converter and can contribute to EMI problems, ground
bounce, and resistive voltage losses, and possibly poor
regulation and instability.
The following guidelines are recommended when devel-
oping a PCB layout:
. The input capacitor, CIN should be placed as close to
the PVIN and PGND pins as possible. This capacitor
provides a low impedance loop for the pulsed
currents present at the buck converter’s input. Use
short wide traces to connect this capacitor as close
to the IC as possible. This will minimize EMI and input
voltage ripple by localizing the high frequency current
pulses.
2. Keep the SW pin traces as short as possible to minimize
pickup of high frequency switching edges to other
parts of the circuit. COUT and L should be connected as
close as possible between the SW and GND pins, with
a direct return to the GND pin from COUT.
3. Route the output voltage feedback/sense path away
from the inductor and SW node to minimize noise
and magnetic interference to the output feedback/
sense path.
4. Use a ground plane referenced to the PGND pin,
and the ground connection of the input and output
capacitors should be put on this plane and close to
each other if possible, and as close to the PGND pin as
possible. Use several vias to connect to the component
side ground to further reduce noise and interference
on sensitive circuit nodes.
5. If possible, minimize the resistance from the VOUT
and AGND pin to the load. This will reduce the
voltage drop on the ground plane and improve the
load regulation. And it will also improve the overall
efficiency by reducing the copper losses on the output
and ground planes.
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