SE7230CA1-E 데이터 시트보기 (PDF) - Intel

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SE7230CA1-E

Intel® Entry Server Board

Intel 

Intel® Entry Server Board SE7230CA1-E TPS

Table of Contents

Table of Contents

1. Introduction .......................................................................................................................... 1

1.1

Section Outline ........................................................................................................ 1

1.2

Server Board Use Disclaimer .................................................................................. 1

2. Server Board Overview ........................................................................................................ 2

2.1

Intel® Entry Server Board SE7230CA1-E Feature Set............................................ 2

3. Functional Architecture ....................................................................................................... 6

3.1

Processor Sub-System ............................................................................................ 7

3.1.1 Processor Voltage Regulator Down (VRD).............................................................. 8

3.1.2 Reset Configuration Logic ....................................................................................... 8

3.1.3

3.2

Processor Support ................................................................................................... 8

Intel® E7230 Chipset................................................................................................ 9

3.2.1 Intel® E7230 Chipset MCH: Memory Control Hub .................................................. 9

3.2.2 I/O Controller Hub.................................................................................................. 12

3.3

Memory Sub-System ............................................................................................. 14

3.3.1 Memory Configuration ........................................................................................... 14

3.3.2 Memory DIMM Support.......................................................................................... 16

3.4

I/O Sub-System ..................................................................................................... 16

3.4.1 PCI Subsystem ...................................................................................................... 16

3.4.2 Interrupt Routing .................................................................................................... 18

3.5

PCI Error Handling................................................................................................. 19

3.5.1 Video Support ........................................................................................................ 22

3.5.2 Network Interface Controller (NIC) ........................................................................ 22

3.5.3 Super I/O Chip ....................................................................................................... 23

3.5.4 BIOS Flash ............................................................................................................ 24

3.5.5 System Health Support.......................................................................................... 25

3.6

Replacing the Back-Up Battery.............................................................................. 25

4. System BIOS ....................................................................................................................... 26

4.1

BIOS Setup Utility .................................................................................................. 26

4.1.1 Localization............................................................................................................ 26

4.1.2 Configuration Reset ............................................................................................... 26

4.1.3 Keyboard Commands ............................................................................................ 26

4.1.4 Entering BIOS Setup ............................................................................................. 27

Revision 1.0

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