MRFIC1817 데이터 시트보기 (PDF) - Motorola => Freescale
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MRFIC1817 Datasheet PDF : 8 Pages
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APPLICATIONS INFORMATION
Design Philosophy
The MRFIC1817 is a 3–stage integrated power amplifier
designed for use in cellular phones, especially for those used
in DCS1800 (PCN) 3.6 V operation. With matching circuit
modifications, it is also applicable for use in DCS1900 (PCS)
equipment. Due to the fact that the input, output and some of
the interstage matching is accomplished off–chip, the device
can be tuned to operate anywhere within the 1500 to 2000
MHz frequency range. Typical performance at different battery
voltages is:
• 33.5 dBm @ 3.6 V
• 32.0 dBm @ 3 V
This capability makes the MRFIC1817 suitable for portable
cellular applications such as:
• 3 V and 3.6 V DCS1800 Class I and II
• 3 V and 3.6 V PCS tag5
RF Circuit Considerations
The MRFIC1817 can be tuned by changing the values
and/or positions of the appropriate external components.
Refer to Figure 2, a typical DCS1800 Class I applications
circuit. The input match is a shunt–L, series–C, high–pass
structure and can be retuned as desired with the only
limitation being the on–chip 6 pF blocking capacitor. For
saturated applications such as DCS1800 and PCS1900, the
input match should be optimized at the rated RF input power.
Interstage matching can be optimized by changing the value
and/or position of the decoupling capacitor on the VD1 and
VD2 supply lines. Moving the capacitor closer to the device or
reducing the value increases the frequency of resonance
with the inductance of the device’s wirebonds and leadframe
pin. Output matching is accomplished with a low–pass
network as a compromise between bandwidth and harmonic
rejection. Implementation is through high Q capacitors
W mounted along a 50 microstrip transmission line. Values
and positions are chosen to present a 2 W loadline to the
device while conjugating the device output parasitics. The
network must also properly terminate the second and third
harmonics to optimize efficiency and reduce harmonic
output. All components used in this application are low–Q
commercial chip capacitors, except for the output load line.
Loss in circuit traces must also be considered. The output
transmission line and the bias supply lines should be at least
0.6 mm in width to accommodate the peak circulating
currents which can be as high as 2 amperes under worst
case conditions. The bias supply line which supplies the
output should include an RF choke of at least 18 nH, surface
mount solenoid inductors or quarter wave microstrip lines.
Discrete inductors will usually give better efficiency and
conserve board space.
Biasing Considerations
Gate bias lines are tied together and connected to the VSS
voltage, allowing gate biasing through use of external
resistors or positive voltages. This allows setting the
quiescent current of all stage in the same time while saving
some board space. For applications where the amplifier is
operated close to saturation, such as with TDMA amplifiers,
the gate bias can be set with resistors. Variations in process
and tempera–ture will not affect amplifier performance
significantly in these applications. The values shown in the
Figure 1 will set quiescent currents of 20 to 40 mA for the first
stage, 150 to 300 mA for the second stage, and 400 to 800
mA for the final stage. For linear modes of operation which
are required for CDMA amplifiers, the quiescent current must
be more carefully controlled. For these applications, the VG
pins can be referenced to some tunable voltage which is set
at the time of radio manufacturing. Less than 1 mA is
required in the divider network so a DAC can be used as the
voltage source.
Power Control Using the MC33169
The MC33169 is a dedicated GaAs power amplifier
support IC which provides the –4 V required for VSS, an
N–MOS drain switch interface and driver and power supply
sequencing. The MC33169 can be used for power control in
applications where the amplifier is operated in saturation
since the output power in non–linear operation is proportional
to VD2. This provides a very linear and repeatable power
control transfer function. This technique can be used open
loop to achieve 40–45 dB dynamic range over process and
temperature variation. With careful design and selection of
calibration points, this technique can be used for DCS1800
control where 30 dB dynamic range is required, eliminating
the need for the complexity and cost of closed–loop control.
The transmit waveform ramping function required for
systems such as DCS1800 can be implemented with a
simple Sallen and Key filter on the MC33169 control loop.
The amplifier is then ramped on as the VRAMP pin is taken
from 0 V to 3 V. To implement the different power steps
required for DCS1800, the VRAMP pin is ramped between 0 V
and the appropriate voltage between 0 V and 3 V for the
desired output power. For closed–loop configurations using
the MC33169, MMSF4N01HD N–MOS switch and the
MRFIC1817 provide a typical 1 MHz 3 dB loop bandwidth.
The STANDBY pin must be enabled (3 V) at least 800 µs
before the VRAMP pin goes high and disabled (0 V) at least 20
ms before the VRAMP pin goes low. This STANDBY function
allows for the enabling of the MC33169 one burst before the
active burst thus reducing power consumption.
Conclusion
The MRFIC1817 offers the flexibility in matching circuitry
and gate biasing required for portable cellular applications.
Together with the MC33169 support IC, the device offers an
efficient system solution for TDMA applications such as
DCS1800 where saturated amplifier operation is used.
For more information about the power control using the
MC33169, refer to application note AN1599, “Power Control
with the MRFIC0913 GaAs Integrated Power Amplifier and
MC33169 Support IC.”
Evaluation Boards
Two versions of the MRFIC1817 evaluation board are
available. Order MRFIC1817DCSTF for the 1.8 GHz version
and order MRFIC1817PCSTF for the 1.9 GHz version. For a
complete list of currently available boards and ones in
development for newly introduced product, please contact
your local Motorola Distributor or Sales Office.
MOTOROLA RF DEVICE DATA
MRFIC1817
7
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