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VCA2611 데이터 시트보기 (PDF) - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

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VCA2611
TAOS
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TAOS
VCA2611 Datasheet PDF : 19 Pages
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PGA OVERVIEW AND OVERALL DEVICE
CHARACTERISTICS
The differential output of the VCA attenuator is then amplified
by the PGA circuit block. This post-amplifier is programmed
by the same MGS bits that control the VCA attenuator,
yielding an overall swept-gain amplifier characteristic in which
the VCA × PGA gain varies from 0dB (unity) to a program-
mable peak gain of 24-, 27-, 30-, 33-, 36-, 39-, 42-, or 45dB.
The Gain vs VCACNTL curve in the Typical Characteristics
shows the composite gain control characteristic of the entire
VCA2616. Setting VCACNTL to 3.0V causes the digital MGS
gain control to step in 3dB increments. Setting VCACNTL to 0V
causes all the MGS-controlled gain curves to converge at
one point. The gain at the convergence point is the LNP gain
less 6dB, because the measurement setup looks at only one
side of the differential PGA output, resulting in 6dB lower
signal amplitude.
ADDITIONAL FEATURESOVERVIEW
Overload protection stages are placed between the attenua-
tor and the PGA, providing a symmetrically clipped output
whenever the input becomes large enough to overload the
PGA. A comparator senses the overload signal amplitude
and substitutes a fixed DC level to prevent undesirable
overload recovery effects. As with the previous stages, the
VCA is AC-coupled into the PGA. In this case, the coupling
time constant varies from 5µs at the highest gain (45dB) to
59µs at the lowest gain (25dB).
The VCA2616 includes a built-in reference, common to both
channels, to supply a regulated voltage for critical areas of
the circuit. This reduces the susceptibility to power-supply
variation, ripple, and noise. In addition, separate power
supply and ground connections are provided for each chan-
nel and for the reference circuitry, further reducing interchannel
crosstalk.
Further details regarding the design, operation, and use of
each circuit block are provided in the following sections.
LOW-NOISE PREAMPLIFIER (LNP)DETAIL
The LNP is designed to achieve a low-noise figure, espe-
cially when employing active termination. Figure 4 is a
simplified schematic of the LNP, illustrating the differential
input and output capability. The input stage employs low
resistance local feedback to achieve stable low-noise, low-
distortion performance with very high input impedance. Nor-
mally, low noise circuits exhibit high power consumption as
a result of the large bias currents required in both input and
output stages. The LNP uses a patented technique that
combines the input and output stages such that they share
the same bias current. Transistors Q4 and Q5 amplify the
signal at the gate-source input of Q4, the +IN side of the LNP.
The signal is further amplified by the Q1 and Q2 stage, and
then by the final Q3 and RL gain stage, which uses the same
bias current as the input devices Q4 and Q5. Devices Q6
through Q10 play the same role for signals on the IN side.
The differential gain of the LNP is given in Equation 1:
Gain
=
2
×
RL
RS
(1)
COMP2A
VDD
CCOMP
(External
Capacitor)
Q2
Q3
RW
Q4
LNPINP
Q1
RL
93
LNPOUTN LNPOUTP
Buffer
Buffer
RS1
105
RS2
34
RS3
17
LNPGS2
LNPGS1
LNPGS3
Q5
COMP1A
RL
93
Q9
Q8
To Bias
Circuitry
Q7
RW
LNPINN
Q10
To Bias
Circuitry
Q6
FIGURE 4. Schematic of the Low-Noise Preamplifier (LNP).
10
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VCA2616, VCA2611
SBOS234D

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