TMP47P201VP 데이터 시트보기 (PDF) - Toshiba

부품명

상세내역

제조사

TMP47P201VP

CMOS 4-bit Microcontroller

Toshiba 

TMP47C101/201

(5) Zero-page

The 16 words (at addresses 00H through 0FH) of the

zero page of the data memory can be used as the user

flags or pointers by using zero-page addressing mode

instructions (comparison, addition, transfer, and bit

manipulation), providing enhanced efficiency in pro-

gramming.

Example: To write immediate data “8” to address 09H if

bit 2 at address 04H in the RAM is “1”.

TEST 04H,2 ;

B

SKIP

ST #8, 09H ;

SKIP:

Skips if bit 2 at address 04H in

the RAM is “0”.

Writes “8” to address 09H in the

RAM

2.4.2 Data Memory Capacity

Figure 2-10. Data Memory Capacity and Address Assignment

When power-on is performed, the contents of the RAM

become unpredictable, so that they must be initialized by the

initialization routine.

Example: To clear RAM (use common to the 47C101 and

47C201)

SCLRRAM:

LD

ST

B

ADD

B

HL, #00H

#0, @HL+

SCLRRAM

H, #1

SCLRRAM

; HL←00H

; RAM [HL]←0, LR

LR + 1

; HR←HR + 1

2.5 ALU and Accumulator

2.5.1 Arithmetic/Logic Unit (ALU)

The ALU performs the arithmetic and logic operations speci-

fied by instructions on 4-bit binary data and outputs the result

of the operation, the carry information(C), and the zero detect

information (z).

(1) Carry information (C)

The carry information indicates a carry-out from the

most significant bit in an addition. A subtraction is per-

formed as addition of two’s complement, so that, with

a subtraction, the carry information indicates that there

is no borrow to the most significant bit. With a rotate

instruction, the information indicates the data to be

shifted out from the accumulator.

10/32

TOSHIBA CORPORATION

Share Link: