AD5722R 데이터 시트보기 (PDF) - Analog Devices

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AD5722R

Complete, Dual, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar, Voltage Output DACs

Analog Devices 

AD5722R/AD5732R/AD5752R

Data Sheet

Parameter

DIGITAL INPUTS3

Input High Voltage, VIH

Input Low Voltage, VIL

Input Current

Pin Capacitance

DIGITAL OUTPUTS (SDO) 3

Output Low Voltage, VOL

Output High Voltage, VOH

Output Low Voltage, VOL

Output High Voltage, VOH

High Impedance Leakage Current

High Impedance Output

Capacitance

POWER REQUIREMENTS

AVDD

AVSS

DVCC

Power Supply Sensitivity3

∆VOUT/∆ΑVDD

AIDD

Min

Typ

2

5

DVCC − 1

DVCC − 0.5

5

4.5

−4.5

2.7

−65

AISS

DICC

0.5

Power Dissipation

Power-Down Currents

AIDD

40

AISS

40

DICC

300

Max Unit

V

0.8

V

±1

µA

pF

0.4

V

V

0.4

V

V

±1

µA

pF

Test Conditions/Comments

DVCC = 2.7 V to 5.5 V, JEDEC compliant

Per pin

Per pin

DVCC = 5 V ± 10%, sinking 200 µA

DVCC = 5 V ± 10%, sourcing 200 µA

DVCC = 2.7 V to 3.6 V, sinking 200 µA

DVCC = 2.7 V to 3.6 V, sourcing 200 µA

16.5

V

−16.5 V

5.5

V

dB

3.25

mA/channel Outputs unloaded

2.4

mA/channel AVSS = 0 V, outputs unloaded

2.5

mA/channel Outputs unloaded

3

µA

VIH = DVCC, VIL = GND

190

mW

±16.5 V operation, outputs unloaded

79

mW

+16.5 V operation, AVSS = 0 V, outputs unloaded

µA

µA

nA

1 For specified performance, the headroom requirement is 0.9 V.

2 INL is the relative accuracy. It is measured from Code 512, Code 128, and Code 32 for the AD5752R, AD5732R, and AD5722R, respectively.

3 Guaranteed by characterization; not production tested.

Rev. F | Page 4 of 32

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