IP101GR 데이터 시트보기 (PDF) - Unspecified

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IP101GR

Single Port 10/100 MII/RMII/TP/Fiber Fast Ethernet Transceiver

Unspecified 

IP101G

Preliminary Data Sheet

Features comparison between IP101G and IP101A/IP101AH

Table 1 Features comparison between IP101G and IP101A/IP101AH

Product Name

IP101GR

IP101G

IP101GA IP101A

IP101AH

Package Type

32pin QFN

Dice

48pin LQFP

48pin LQFP

REGOUT(1) Output Voltage 1.0V, pin28 1.0V, pad5 1.0V, pin8

2.5V, pin32

and location

and pad11

REGIN Input Voltage and

NA(2)

1.0V, pad23

NA

2.5V, pin8

location

and pad26

RMII mode setting

Pin4

Pad18

Pin1

Pin1 and pin44

Fiber mode setting:

Pin19

Pad39

Pin22

NA Pin24 and pin48

Fiber FXSD signal:

Pin1

Pad13

Pin43

Pin37

Number of LED

2

4

4

5

LED mode

1 and 2

1 and 2

LED Blink Timing

On 26ms -> Off 78ms

On 26ms -> Off 78ms

PHY address number(3)

Single: 0 ~ 1

Single: 0 ~ 7

Single: 0 ~ 31

Multi: 2 ~ 31

Multi: 8 ~ 31

Center-tap of transformer

Do not connect to any power

2.5V input power

Built-in 49.9ohm resistors

Yes

No

Power consumption

~150mW

~480mW

Process

85nm

0.25μm

IEEE 802.3az

Yes

No

10Base TX amplitude

~1.75V (10Base-Te)

~2.5V (10Base-T)

WOL+ (Wake On LAN Plus)

Yes

No

Analog OFF

Yes

No

16 bit RX counter

Yes

No

9 bit RXER/CRC counter

Yes

No

RX to TX Loopback

Yes

No

Loopback MII/RMII

Yes

Yes

SNI mode

No

Yes

Note 1: Regulator voltage output is for internal use only. Do not supply to any other device.

Note 2: Not available for this function. The 1.0V is supplied by the regulator that built-in the chip.

Note 3: Do not let these PHY address pins floating for the latched-in settings after the power is ready.

7/65

December 24 2012

Copyright © 2011, IC Plus Corp.

IP101G-DS-R01

www.BDTIC.com/ICplus

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