ALC5640 데이터 시트보기 (PDF) - Realtek Semiconductor
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ALC5640
Realtek Semiconductor
ALC5640 Datasheet PDF : 150 Pages
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ALC5640-VB
Datasheet
List of Figures
FIGURE 1. BLOCK DIAGRAM .......................................................................................................................................................4
FIGURE 2. AUDIO MIXER PATH ...................................................................................................................................................5
FIGURE 3. DIGITAL MIXER PATH ................................................................................................................................................6
FIGURE 4. PIN ASSIGNMENTS ......................................................................................................................................................7
FIGURE 5. POWER ON/OFF SEQUENCE ......................................................................................................................................14
FIGURE 6. AUDIO CLOCK TREE .................................................................................................................................................16
FIGURE 7. SYSTEM CONNECTION FOR ASRC FUNCTION...........................................................................................................20
FIGURE 8. PCM MONO DATA MODE A FORMAT (BCLK POLARITY=0) ..............................................................................22
FIGURE 9. PCM MONO DATA MODE A FORMAT (BCLK POLARITY=1) ..............................................................................22
FIGURE 10. PCM MONO DATA MODE B FORMAT (BCLK POLARITY=0) ............................................................................23
FIGURE 11. PCM STEREO DATA MODE A FORMAT (BCLK POLARITY=0)............................................................................23
FIGURE 12. PCM STEREO DATA MODE B FORMAT (BCLK POLARITY=0)..............................................................................23
FIGURE 13. I2S DATA FORMAT (BCLK POLARITY=0).............................................................................................................24
FIGURE 14. LEFT-JUSTIFIED DATA FORMAT (BCLK POLARITY=0) ........................................................................................24
FIGURE 15. 4-CHANNEL RECORDING PATH ................................................................................................................................25
FIGURE 16. 4-CHANNEL PLAYBACK PATH ..................................................................................................................................26
FIGURE 17. SPEAKER OUTPUT MODE – STEREO MODE...............................................................................................................29
FIGURE 18. DAC DRC FUNCTION BLOCK ..................................................................................................................................33
FIGURE 19. ADC AGC FUNCTION BLOCK..................................................................................................................................33
FIGURE 20. DRC/AGC FOR PLAYBACK/RECORDING MODE .......................................................................................................34
FIGURE 21. DRC/AGC FOR NOISE GATE MODE.........................................................................................................................35
FIGURE 22. RATIO GAIN BEHAVIOR FOR SPKVDD AND AVDD ................................................................................................36
FIGURE 23. WIND NOISE DETECTOR...........................................................................................................................................40
FIGURE 24. DATA TRANSFER OVER I2C CONTROL INTERFACE ...................................................................................................41
FIGURE 26. GPIO FUNCTION BLOCK ..........................................................................................................................................43
FIGURE 27. IRQ FUNCTION BLOCK.............................................................................................................................................44
FIGURE 27. JD SOURCE SELECTION ............................................................................................................................................45
FIGURE 28. POWER MANAGEMENT.............................................................................................................................................46
FIGURE 29. SNC FUNCTION DIAGRAM .......................................................................................................................................47
FIGURE 30. SNC FUNCTION BLOCK............................................................................................................................................47
FIGURE 31. I2C CONTROL INTERFACE.......................................................................................................................................131
FIGURE 32. TIMING OF I2S/PCM MASTER MODE......................................................................................................................132
FIGURE 33. I2S/PCM SLAVE MODE TIMING .............................................................................................................................133
FIGURE 34. DIGITAL MICROPHONE INTERFACE TIMING............................................................................................................134
FIGURE 35. APPLICATION CIRCUIT ...........................................................................................................................................136
FIGURE 36. PACKAGE DIMENSION ............................................................................................................................................137
Multi-Channel Audio Hub/CODEC and SounzRealTM
xi
Digital Sound Effect for Mobile Devices
Rev. 0.91
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