ST7066 데이터 시트보기 (PDF) - Unspecified

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ST7066

Dot Matrix LCD Controller/Driver

Unspecified 

ST7066

Block Diagram

Reset

Circuit

OSC1

OSC2

CPG

Timing

Generator

CL1

CL2

M

D

RS

MPU

Interface

RW

E

DB4 to

DB7

DB0 to

DB3

Input/

Output

Buffer

Instruction

Register (IR)

Instruction

Decoder

Display

data RAM

(DDRAM)

80x8 bits

Address

Counter

16-bit

shift

registe

r

Common

Signal

Driver

COM1 to

COM16

40-bit

shift

registe

r

40-bit

latch

circuit

Segment

Signal

Driver

SEG1 to

SEG40

Data

Register

(DR)

Busy

Flag

LCD Drive

Voltage

Selector

Character

generator

RAM

(CGRAM)

64 bits

Character

generator

ROM

(CGROM)

9,920 bits

Cursor

and

Blink

controller

Parallel/Serial converter

GND

and

Attribute Circuit

Vcc

V1

V2 V3

V4 V5

V1.2

2

2000/6/13

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