MMA8451QT(2010) 데이터 시트보기 (PDF) - Freescale Semiconductor

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MMA8451QT
(Rev.:2010)

3-Axis, 14-bit/8-bit Digital Accelerometer

Freescale Semiconductor 

6.7 Auto-WAKE/SLEEP Detection ..................................................................................................................................43

0x29 ASLP_COUNT Register (Read/Write) ........................................................................................................43

Table 57. ASLP_COUNT Description .......................................................................................................................43

Table 58. ASLP_COUNT Relationship with ODR .....................................................................................................43

Table 59. SLEEP/WAKE Mode Gates and Triggers .................................................................................................43

6.8 Control Registers .......................................................................................................................................................44

0x2A: CTRL_REG1 System Control 1 Register ...........................................................................................................44

0x2A CTRL_REG1 Register (Read/Write) ..........................................................................................................44

Table 60. CTRL_REG1 Description ..........................................................................................................................44

Table 61. SLEEP Mode Rate Description .................................................................................................................44

Table 62. System Output Data Rate Selection ..........................................................................................................44

Table 63. Full Scale Selection ...................................................................................................................................44

0x2B: CTRL_REG2 System Control 2 Register ...........................................................................................................45

0x2B CTRL_REG2 Register (Read/Write) ..........................................................................................................45

Table 64. CTRL_REG2 Description ..........................................................................................................................45

Table 65. MODS Oversampling Modes .....................................................................................................................45

Table 66. MODS Oversampling Modes Current Consumption and Averaging Values at each ODR .......................45

0x2C: CTRL_REG3 Interrupt Control Register ............................................................................................................46

0x2C CTRL_REG3 Register (Read/Write) ..........................................................................................................46

Table 67. CTRL_REG3 Description ..........................................................................................................................46

0x2D: CTRL_REG4 Register (Read/Write) ..................................................................................................................46

0x2D CTRL_REG4 Register (Read/Write) ..........................................................................................................46

Table 68. Interrupt Enable Register Description .......................................................................................................46

0x2E CTRL_REG5 Register (Read/Write) ...................................................................................................................47

0x2E: CTRL_REG5 Interrupt Configuration Register ..........................................................................................47

Table 69. Interrupt Configuration Register Description .............................................................................................47

6.9 User Offset Correction Registers ..............................................................................................................................47

0x2F: OFF_X Offset Correction X Register ..................................................................................................................47

0x2F OFF_X Register (Read/Write) ....................................................................................................................47

Table 70. OFF_X Description ....................................................................................................................................47

0x30: OFF_Y Offset Correction Y Register ..................................................................................................................47

0x30 OFF_Y Register (Read/Write) ....................................................................................................................47

Table 71. OFF_Y Description ....................................................................................................................................47

0x31: OFF_Z Offset Correction Z Register ..................................................................................................................47

0x31 OFF_Z Register (Read/Write) .....................................................................................................................47

Table 72. OFF_Z Description ....................................................................................................................................47

Table 73. MMA8451Q Register Map .........................................................................................................................48

Table 74. Accelerometer Output Data .......................................................................................................................49

Package Dimensions................................................................................................................................................................50

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