MCM6249WJ20 데이터 시트보기 (PDF) - Motorola => Freescale
부품명
상세내역
제조사
MCM6249WJ20 Datasheet PDF : 7 Pages
| |||
WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)
MCM6249–20 MCM6249–25 MCM6249–35
Parameter
Symbol Min Max Min Max Min Max Unit Notes
Write Cycle Time
Address Setup Time
Address Valid to End of Write
Write Pulse Width
tAVAV
20
—
25
—
35
—
ns
4
tAVWL
0
—
0
—
0
—
ns
tAVWH
15
—
17
—
20
—
ns
tWLWH,
15
—
17
—
20
—
ns
tWLEH
Data Valid to End of Write
tDVWH
10
—
10
—
15
—
ns
Data Hold Time
tWHDX
0
—
0
—
0
—
ns
Write Low to Data High–Z
tWLQZ
0
9
0
10
0
15
ns 5,6,7
Write High to Output Active
tWHQX
5
—
5
—
5
—
ns 5,6,7
Write Recovery Time
tWHAX
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus con–
tention conditions during read and write cycles.
3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timings are referenced from the last valid address to the first transitioning address.
5. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1b.
6. This parameter is sampled and not 100% tested.
7. At any given voltage and temperature, tWLQZ max < tWHQX min both for a given device and from device to device.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1 (W Controlled, See Notes 1, 2, and 3)
tAVAV
tAVWH
tAVWL
HIGH–Z
tWLQZ
tWLWH
tWLEH
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MOTOROLA FAST SRAM
MCM6249
5
Share Link: 