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100329A 데이터 시트보기 (PDF) - Fairchild Semiconductor

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100329A Datasheet PDF : 8 Pages
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Test Circuitry (TTL-to-ECL)
Note: RT = 50termination resistive load. When an input or output is being monitored by a scope, RTis supplied by the scopes 50input resistance. When
an input or output is not being monitored, an external 50resistance must be applied to serve as RT.
Note: TTL and ECL force signals are brought to the DUT via 50coax lines.
Note: VTTL is decoupled to ground with 0.1 µF, VEE is decoupled to ground with 0.01 µF and VCC is connected to ground.
FIGURE 1. TTL-to-ECL AC Test Circuit
Switching Waveforms (TTL-to-ECL)
FIGURE 2. TTL to ECL Transition—Propagation Delay and Transition Times
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