LE28C1001M 데이터 시트보기 (PDF) - SANYO -> Panasonic
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LE28C1001M Datasheet PDF : 14 Pages
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LE28C1001M, T-90/12/15
Data Protection
Hardware Data Protection
Noise and glitch protection: The LE28C1001M, T series do not execute write operations for WE or OE pulses that are 15
ns or shorter.
Power (VCC) on and cutoff detection: The programming operation is disabled when VCC is 2.5 V or lower.
Write inhibit mode: Writing is disabled when OE is low and either CE is high or WE is high. Use this function to prevent
writes from occurring when the power is being turned on or off.
Software Data Protection
The LE28C1001M, T series implement the optional software data protection function recognized by JEDEC. This
function requires a 3-byte load operation to be performed before a write operation data load. The 3-byte load sequence
starts a page load cycle without activating any write operation. Thus this is an optimal protection scheme for unintended
write cycles triggered by noise associated with powering the chip on or off. Note that the LE28C1001M, T series are
shipped with the software data protection function disabled.
The software data protection circuit is activated by executing a 3-byte byte load cycle in advance of the data sequence in
the page load cycle. (See Figure 6.) This causes the device to automatically enter data protection mode. After this, write
operations require a 3-byte byte load cycle to be executed in advance. A 6-byte write sequence is required to switch the
device out of this protection mode. Figure 7 shows the timing diagram. If a write operation is attempted in software
protection mode, all device functions are disabled for 200 µs. Figure 12 shows the flowchart for this operation.
Chip Erase
The LE28C1001M, T series provide a chip erase mode that erases all of the memory cell array and sets each bit to the 1
state. This mode can be effective when it is necessary to erase all data quickly.
5 V Single-Voltage Power Supply Software Chip Erase
The software chip erase mode operation is started by executing a specially defined 6-byte byte load sequence, similar to
page mode operation under software protection. After the load cycle is executed, the device enters an internal
programming cycle similar to the write cycle. Figure 8 shows the timing diagram and Figure 14 shows the flowchart for
this operation.
Product Identification
The device identification code is used for recognizing the device and its manufacturer. This mode can be used by
hardware and software. The hardware operating mode is used to recognize algorithms that match the device when an
external programming unit is used. Also, user systems can recognize the product number using software product
identification mode. Figure 13 shows the flowchart for this operation. The manufacturer and device codes are the same
in both modes.
No. 5129-5/14
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