100EL11 데이터 시트보기 (PDF) - Fairchild Semiconductor
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100EL11 Datasheet PDF : 5 Pages
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January 2003
Revised January 2003
100EL11
5V ECL 1:2 Differential Fanout Buffer
General Description
The 100EL11 is a 5V 1:2 differential fanout buffer. One dif-
ferential input signal is fanned out to two identical differen-
tial outputs. By supplying a constant reference level to one
input pin a single ended input condition is created.
With inputs open or both inputs at VEE the differential Q
outputs default LOW and Q outputs default HIGH.
The 100 series is temperature compensated.
Features
s Typical propagation delay of 265 ps
s Typical IEE of 26 mA
s Typical Skew of 5 ps between outputs
s Internal pull-down resistors on inputs
s Fairchild MSOP-8 package is a drop-in replacement to
ON TSSOP-8
s Meets or exceeds JEDEC specification EIA/JESD78 IC
latch-up test
s Moisture Sensitivity Level 1
s ESD Performance:
Human Body Model > 2000V
Machine Model > 200V
Ordering Code:
Product
Order Number Package Code
Package Description
Number Top Mark
100EL11M
M08A KEL11 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
100EL11M8
(Preliminary)
MA08D KL11 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Top View
Pin Descriptions
Pin Name
Q0, Q0, Q1, Q1
D, D
VCC
VEE
Description
ECL Data Outputs
ECL Data Inputs
Positive Supply
Negative Supply
© 2003 Fairchild Semiconductor Corporation DS500769
www.fairchildsemi.com
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