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EMIF02-MIC02F2(2008) 데이터 시트보기 (PDF) - STMicroelectronics

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EMIF02-MIC02F2
(Rev.:2008)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
EMIF02-MIC02F2 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
EMIF02-MIC02F2
3
Ordering information scheme
Figure 11. Ordering information scheme
Ordering information scheme
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10 pF
or
3 letters = application
2 digits = version
Package
F = Flip Chip
x = 2: Lead-free, pitch = 500 µm, bump = 315 µm
4
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.
Figure 12. Package dimensions
500 µm ± 50
315 µm ± 50
650µm ± 65
210 µm
0.92 mm ± 50µm
5/8

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