24C128C 데이터 시트보기 (PDF) - Atmel Corporation
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24C128C Datasheet PDF : 23 Pages
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Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
Figure 6-3. Output Acknowledge
SCL
1
Data In
8
9
Data Out
Start
Acknowledge
Standby Mode: AT24C128C features a low-power standby mode that is enabled upon power-up and after the
receipt of the stop bit and the completion of any internal operations.
Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be protocol
reset by following these steps:
1. Create a Start condition (if possible).
2. Clock nine cycles.
3. Create another Start condition followed by Stop condition as shown below.
The device should be ready for the next communication after above steps have been completed. In the event
that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset
the device.
Figure 6-4. Software Reset
Dummy Clock Cycles
SCL
1
2
3
Start
Condition
SDA
8
9
Start
Condition
Stop
Condition
AT24C128C [DATASHEET]
7
Atmel-8734D-SEEPROM-AT24C128C-Datasheet_082015
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