21143 데이터 시트보기 (PDF) - Intel

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21143

PCI/CardBus 10/100 Ethernet LAN Controller

Intel 

1.0

21143

21143 Overview

The Intel 21143 PCI/CardBus* 10/100-Mb/s Ethernet LAN Controller (21143) supports the

peripheral component interconnect (PCI) bus or CardBus. It provides a direct interface connection

to the PCI bus and adapts easily to the CardBus and most other standard buses. The 21143 software

interface and data structures are optimized to minimize the host CPU load and to allow for

maximum flexibility in the buffer descriptor management. The 21143 contains large onchip FIFOs,

so no additional onboard memory is required. The 21143 also provides an upgradable boot ROM

interface.

In addition to the features listed on the title pages, the following features are also supported by the

21143:

PCI and CardBus Features:

• Supports PCI and CardBus interfaces.

• Supports PCI/CardBus clock control through clkrun.

• Supports CardBus cstschg pin and Status Changed registers.

• Supports automatic loading of subvendor ID and CardBus card information structure (CIS)

pointer from serial ROM to configuration registers.

• Supports storage of CardBus card information structure (CIS) in the serial ROM or the

expansion ROM.

• Supports the advanced PCI/CardBus read multiple, read line, and write and invalidate

commands.

• Supports an unlimited PCI/CardBus burst.

Host Interface Features:

• Includes a powerful onchip direct memory access (DMA) with programmable burst size,

providing low CPU utilization.

• Supports early interrupt on transmit and receive.

• Supports interrupt mitigation on transmit and receive.

• Supports big or little endian byte ordering for buffers and descriptors.

• Implements unique, patented intelligent arbitration between DMA channels to minimize

underflow and overflow.

• Contains large independent receive and transmit FIFOs.

Network Side Features:

• Supports three network ports: 10BASE-T (10 Mb/s), AUI (10 Mb/s), and

MII/SYM (10/100 Mb/s).

• Contains a variety of flexible address filtering modes.

• Implements signal-detect filtering to avoid false detection of link with 100BASE-TX symbol

interfaces.

• Enables automatic detection and correction of 10BASE-T receive polarity.

• Supports autodetection between 10BASE-T, AUI, and MII/SYM ports.

• Offers a unique, patented solution to Ethernet capture-effect problem.

Preliminary Datasheet

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