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MT28C3212P2FL 데이터 시트보기 (PDF) - Micron Technology

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MT28C3212P2FL
Micron
Micron Technology Micron
MT28C3212P2FL Datasheet PDF : 47 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2 MEG x 16 PAGE FLASH
128K x 16 SRAM COMBO MEMORY
ARCHITECTURE AND MEMORY
ORGANIZATION
The Flash memory device contains two separate
memory banks (bank a and bank b) for simultaneous
READ and WRITE operations. Bank a is 2Mb deep and
contains 8 x 4K-word parameter blocks and seven 32K-
word blocks. Bank b is 28Mb deep, is equally sectored,
and contains fifty-six 32K-word blocks.
Figures 2 and 3 show the top and bottom memory
organizations.
2 Meg x 16 Page Flash 128K x 16 SRAM Combo Memory
MT28C3212P2FL_2.p65 – Rev. 2, Pub. 4/02
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.

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