3972 데이터 시트보기 (PDF) - Allegro MicroSystems
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3972 Datasheet PDF : 12 Pages
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3972
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION (continued)
Word 1 Bit Assignments
Bit
Function
D0
Word select = 1
D1
Blank-time LSB
D2
Blank-time MSB
D3
Off-time LSB
D4
Off-time bit 1
D5
Off-time bit 2
D6
Off-time bit 3
D7
Off-time MSB
D8
Fast-decay time LSB
D9
Fast-decay time bit 1
D10
Fast-decay time bit 2
D11
Fast-decay time MSB
D12
C0 oscillator control
D13
C1 oscillator control
D14
SR control bit 1
D15
SR control bit 2
D16
Reserved for testing
D17
Reserved for testing
D18
Idle mode
D1 – D2 Blank Time. These two bits set the blank time for
the current-sense comparator. When a source driver turns on, a
current spike occurs due to the reverse-recovery currents of the
clamp diodes and/or switching transients related to distributed
capacitance in the load. To prevent this current spike from
erroneously resetting the source-enable latch, the sense com-
parator is blanked. The blank timer runs after the off-time
counter to provide the programmable blanking function. The
blank timer is reset when PHASE is changed.
D2
D1
Time
0
0
4/fOSC
0
1
6/fOSC
1
0
8/fOSC
1
1
12/fOSC
D3 – D7 Fixed Off Time. These five bits set the fixed off-
time for the internal PWM control circuitry. Fixed off-time is
defined by:
toff = [(1 + N) x 8/fOSC] - 1/fOSC
where N = 0….31
For example, with a master oscillator frequency of 4 MHz, the
fast-decay time will be adjustable from 1.75 µs to 63.75 µs in
increments of 2 µs.
D8 – D11 Fast Decay Time. These four bits set the fast-
decay portion of fixed off-time for the internal PWM control
circuitry. The fast-decay portion is defined by:
tfd = [(1 + N) x 8/fOSC] - 1/fOSC
where N = 0….15
For example, with an oscillator frequency of 4 MHz, the fast-
decay time will be adjustable from 1.75 µs to 31.75 µs in
increments of 2 µs. For tfd > toff , the device will effectively
operate in fast-decay mode.
D12 – D13 Oscillator Control. A 4 MHz internal oscillator
is used for the timing functions and charge-pump clock. If
more precise control is required, an external oscillator can be
input to the OSC terminal. To accommodate a wider range of
system clocks, an internal divider is provided to generate the
desired MO frequency according to the following table:
D13 D12
0
0
0
1
1
0
1
1
OSC
4 MHz internal clock
External clock
External clock/2
External clock/4
D14 – D15 Synchronous Rectification.
D15 D14
0
0
0
1
1
0
1
1
Synchronous Rectifier
Active
Disabled
Passive
Low side only
The different modes of operation are in the synchronous
rectification section of the functional description.
D16, D17. These bits are reserved for testing and should be
programmed to zero during normal operation.
D18 Idle Mode. The device can be placed in a low power
“idle” mode by writing a “0” to D18. The outputs will be
disabled, the charge pump will be turned off, and the device
will draw a lower load supply currrent. The undervoltage
monitor circuit will remain active. D18 should be programmed
high for 1 ms before attempting to enable any output driver.
continued next page ...
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6
Worcester, Massachusetts 01615-0036 (508) 853-5000
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