39LF020 데이터 시트보기 (PDF) - Silicon Storage Technology
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39LF020 Datasheet PDF : 24 Pages
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512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
Data Sheet
AC CHARACTERISTICS
TABLE 9: READ CYCLE TIMING PARAMETERS
VDD = 3.0-3.6V FOR SST39LF512/010/020/040 AND 2.7-3.6V FOR SST39VF512/010/020/040
SST39LF512-45
SST39LF010-45
SST39LF020-45
SST39LF040-45
SST39LF020-55
SST39LF040-55
SST39VF512-70
SST39VF010-70
SST39VF020-70
SST39VF040-70
SST39VF512-90
SST39VF010-90
SST39VF020-90
SST39VF040-90
Symbol Parameter
Min Max Min Max Min Max Min Max Units
TRC
Read Cycle Time
45
55
70
90
TCE
Chip Enable Access Time
45
55
70
90
TAA
Address Access Time
45
55
70
90
TOE
Output Enable Access Time
30
30
35
45
TCLZ1 CE# Low to Active Output
0
0
0
0
TOLZ1 OE# Low to Active Output
0
0
0
0
TCHZ1 CE# High to High-Z Output
15
15
25
30
TOHZ1 OE# High to High-Z Output
15
15
25
30
TOH1
Output Hold from Address Change
0
0
0
0
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
ns
ns
ns
ns
ns
ns
ns
ns
ns
T9.2 395
TABLE 10: PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min
Max
Units
TBP
Byte-Program Time
20
µs
TAS
Address Setup Time
0
ns
TAH
Address Hold Time
30
ns
TCS
WE# and CE# Setup Time
0
ns
TCH
WE# and CE# Hold Time
0
ns
TOES
OE# High Setup Time
0
ns
TOEH
OE# High Hold Time
10
ns
TCP
CE# Pulse Width
40
ns
TWP
TWPH1
TCPH1
WE# Pulse Width
WE# Pulse Width High
CE# Pulse Width High
40
ns
30
ns
30
ns
TDS
TDH1
TIDA1
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
40
ns
0
ns
150
ns
TSE
Sector-Erase
25
ms
TSCE
Chip-Erase
100
ms
T10.1 395
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
9
S71150-03-000 6/01 395
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