73M2901-32I-3 데이터 시트보기 (PDF) - TDK Corporation
부품명
상세내역
제조사
73M2901-32I-3 Datasheet PDF : 17 Pages
| |||
RESET
A reset is accomplished by holding the RESET pin
high. To ensure a proper power-on reset, the reset
pin must be held high for a minimum of 3µs. At
power on, the voltage at VPD, VPA, and RESET
must come up at the same time for a proper reset.
73M2901/3.3V
Advanced Single
Chip Modem
ASYNCHRONOUS AND SYNCHRONOUS SERIAL
DATA INTERFACE
The serial data interface consists of the TXD and
RXD data paths (LSBit shifted in and out first,
respectively); and the TXCLK and RXCLK serial
clock outputs associated with the data pins;
CTS/RTS flow control; DCR, DSR and DTR. In
synchronous mode, the data is passed at the bit rate
(tolerance is +1%, -2.5%).
PIN DESCRIPTIONS
POWER PIN DESCRIPTION
PIN NAME
VPA
VNA
VPD
VND
32-PIN
15
21
6, 25,
29
5, 22,
26
44-PIN
16
22
2,12,
27, 33
11, 24,
44, 28
TYPE
I
I
I
I
DESCRIPTION
Positive analog voltage (+ Analog Supply)
Negative analog voltage. (Analog Ground)
Positive digital voltage (+ Digital Supply)
Negative digital voltage. (Digital Ground)
ANALOG INTERFACE PIN DESCRIPTION
PIN NAME
RXA
TXAN
TXAP
HBDEN
VBG
VREF
32-PIN
20
16
17
14
19
18
44-PIN
21
17
18
15
20
19
TYPE
I
O
O
I
O
O
DESCRIPTION
Receive analog data
Transmit Analog -
Transmit Analog +
2w/4w hybrid driver enable pin
0 = Driver configured for 50kΩ or greater load (Tie to VND)
1 = Driver configured for driving line-coupling transformer (Tie to
VPD)
Analog Band Gap voltage reference pin (0.1µF to VNA)
Analog reference voltage pin (0.1µF to VNA)
EXTERNAL INTERRUPTS PIN DESCRIPTIONS
PIN NAME
RING
ASRCH
DTR
32-PIN
2
1
32
44-PIN
39
38
37
TYPE
I
I
I
DESCRIPTION
External interrupt – Line interface ring detection circuitry input
External interrupt – Autobaud detection, connected to TXD
External interrupt – DTE DTR signal input
3
Share Link: 