74AHC30 데이터 시트보기 (PDF) - NXP Semiconductors.

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74AHC30

8-input NAND gate

NXP Semiconductors. 

NXP Semiconductors

74AHC30; 74AHCT30

8-input NAND gate

5. Pinning information

5.1 Pinning

A1

B2

C3

D4

E5

F6

GND 7

74AHC30

74AHCT30

14 VCC

13 n.c.

12 H

11 G

10 n.c.

9 n.c.

8Y

001aai162

Fig 4. Pin configuration SO14 and TSSOP14

5.2 Pin description

Table 2.

Symbol

A

B

C

D

E

F

GND

Y

n.c.

n.c.

G

H

n.c.

VCC

Pin description

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

Description

data input

data input

data input

data input

data input

data input

ground (0 V)

data output

not connected

not connected

data input

data input

not connected

supply voltage

74AHC30

74AHCT30

terminal 1

index area

B2

C3

D4

E5

F6

GND(1)

13 n.c.

12 H

11 G

10 n.c.

9 n.c.

001aak237

Transparent top view

(1) The die substrate is attached to this pad using

conductive die attach material. It can not be used as a

supply pin or input.

Fig 5. Pin configuration DHVQFN14

74AHC_AHCT30_3

Product data sheet

Rev. 03 — 26 June 2009

© NXP B.V. 2009. All rights reserved.

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