74F379A 데이터 시트보기 (PDF) - Philips Electronics
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74F379A Datasheet PDF : 10 Pages
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Philips Semiconductors
Quad register
Product specification
74F379A
FEATURES
• Edge–triggered D–type inputs
• Buffered positive edge–triggered clock
• Buffered common enable input
• True and complementary outputs
• Offers light loading PNP inputs (IIL = –20µA)
TYPE
74F379A
TYPICAL fmax
200MHz
DESCRIPTION
The 74F379A is a 4–bit register with buffered common
enable (E). This device is similar to the 74F175A but
features the common enable rather than common master
reset.
TYPICAL SUPPLY CURRENT (TOTAL)
29mA
ORDERING INFORMATION
DESCRIPTION
16–pin plastic DIP
16–pin plastic SO
ORDER CODE
COMMERCIAL RANGE
VCC = 5V ±10%, Tamb = 0°C to +70°C
N74F379AN
N74F379AD
PKG, DWG. #
SOT38–4
SOT109–1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
TYPE
PINS
DESCRIPTION
D0 – D3
Data inputs
74F379A
CP
Clock pulse input (active rising edge)
E
Enable input (active low)
Q0 – Q3 True outputs
Q0 – Q3 Complementary outputs
Note to input and output loading and fan out table
1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
74F (U.L.) HIGH/
LOW
1.0/0.033
1.0/0.033
1.0/0.033
50/33
50/33
PIN CONFIGURATION
LOGIC SYMBOL
LOAD VALUE
HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
1.0mA/20mA
15mA/20mA
E1
Q0 2
Q0 3
D0 4
D1 5
Q1 6
Q1 7
GND 8
16 VCC
15 Q3
14 Q3
13 D3
12 D2
11 Q2
10 Q2
9 CP
SF00354
4 5 12 13
D0 D1 D2 D3
9
CP
1
E
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3
VCC = Pin 16
GND = Pin 8
3 2 6 7 11 10 14 15
SF00355
1996 Mar 12
2
853-0027 16555
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