74LV132 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LV132 Datasheet PDF : 17 Pages
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NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
6. Pinning information
6.1 Pinning
1A 1
1B 2
14 VCC
13 4B
1Y 3
2A 4
12 4A
132
11 4Y
2B 5
10 3B
2Y 6
9 3A
GND 7
8 3Y
001aac203
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
74LV132
terminal 1
index area
1B 2
1Y 3
2A 4
2B 5
2Y 6
VCC(1)
13 4B
12 4A
11 4Y
10 3B
9 3A
001aah099
Transparent top view
(1) The die substrate is attached to the exposed die pad
using conductive die attach material. It cannot be
used as a supply pin or input.
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A
1B
1Y
2A
2B
2Y
GND
3Y
3A
3B
4Y
4A
4B
VCC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input
data input
data output
data input
data input
data output
ground (0 V)
data output
data input
data input
data output
data input
data input
supply voltage
74LV132_5
Product data sheet
Rev. 05 — 2 July 2009
© NXP B.V. 2009. All rights reserved.
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