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74LV132 데이터 시트보기 (PDF) - NXP Semiconductors.

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74LV132
NXP
NXP Semiconductors. NXP
74LV132 Datasheet PDF : 17 Pages
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NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter
Conditions
40 °C to +85 °C
Min Typ[1] Max
tpd
propagation delay nA, nB to nY; see Figure 6
[2]
VCC = 1.2 V
-
65
-
VCC = 2.0 V
-
18
34
VCC = 2.7 V
-
VCC = 3.0 V to 3.6 V; CL = 15 pF [3] -
VCC = 3.0 V to 3.6 V
[3]
-
VCC = 4.5 V to 5.5 V
[3]
-
CPD
power dissipation CL = 50 pF; fi = 1 MHz;
capacitance
VI = GND to VCC
[4]
-
15
24
10
-
12
20
9.0 14
24
-
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
Σ(CL × VCC2 × fo) = sum of the outputs.
40 °C to +125 °C Unit
Min
Max
-
-
ns
-
43
ns
-
30
ns
-
-
ns
-
25
ns
-
17
ns
-
-
pF
12. Waveforms
VI
nA, nB input
GND
VOH
nY output
VOL
VM
t PHL
VM
t PLH
001aaa662
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. The input (nA, nB) to output (nY) propagation delays
74LV132_5
Product data sheet
Rev. 05 — 2 July 2009
© NXP B.V. 2009. All rights reserved.
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